The 74LVC273 has eight edge-triggered, D-type flip-flops with individual Dn inputs and Qn outputs. The common clock (CP) and master reset (MR) inputs load and reset (clear) all flip-flops simultaneously. The state of each Dn input, one set-up time before the LOW-to-HIGH clock transition, is transferred to the corresponding output (Qn) of the flip-flop. All outputs will be forced LOW independently of clock or data inputs by a LOW voltage level on the MR input.
The device is useful for applications where the true output only is required and the clock and master reset are common to all storage elements.
Name/Description | Modified Date |
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Octal D-type flip-flop with reset; positive edge-trigger (REV 6.0) PDF (127.0 kB) 74LVC273 [English] | 31 Dec 2012 |
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Sorting through the low voltage logic maze (REV 1.0) PDF (72.0 kB) AN10156 [English] | 13 Mar 2013 |
Package lead inductance considerations in high-speed applications (REV 1.0) PDF (43.0 kB) AN212 [English] | 13 Mar 2013 |
Pin FMEA for LVC family (REV 1.0) PDF (44.0 kB) AN11009 [English] | 04 Feb 2011 |
Power considerations when using CMOS and BiCMOS logic devices (REV 1.0) PDF (100.0 kB) AN263 [English] | 05 Feb 2002 |
Interfacing 3 Volt and 5 Volt Applications (REV 1.0) PDF (63.0 kB) AN240 [English] | 15 Sep 1995 |
Name/Description | Modified Date |
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ロジック製品セレクションガイド... (REV 1.0) PDF (38.3 MB) LOGIC_SELECTION_GUIDE_2015_JP [English] | 19 Nov 2015 |
Logic selection guide 2016 (REV 1.1) PDF (15.3 MB) 75017285 [English] | 08 Jan 2015 |
Name/Description | Modified Date |
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plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 20 terminals; body 2.5 x 4.5 x... (REV 1.0) PDF (190.0 kB) SOT764-1 [English] | 08 Feb 2016 |
Name/Description | Modified Date |
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DHVQFN20; Reel pack; SMD, 7" Q1/T1 Standard product orientation Orderable part number ending ,115 or... (REV 4.0) PDF (203.0 kB) SOT764-1_115 [English] | 23 Apr 2013 |
Product | Status | Family | VCC (V) | Function | Logic switching levels | Description | Package version | Output drive capability (mA) | tpd (ns) | fmax (MHz) | Power dissipation considerations | Tamb (Cel) | Rth(j-a) (K/W) | Ψth(j-top) (K/W) | Rth(j-c) (K/W) | Package name | No of pins |
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74LVC273BQ | Active | LVC | 1.2 - 3.6 | D-type flip-flops | CMOS/LVTTL | positive-edge trigger | SOT764-1 | +/- 24 | 6 | 230 | low | -40~125 | 79 | 9.6 | 50 | DHVQFN20 | 20 |
Product ID | Package Description | Outline Version | Reflow/Wave Soldering | Packing | Product Status | Part NumberOrdering code(12NC) | Marking | Chemical Content | RoHS / Pb Free / RHF | LeadFree Conversion Date | EFR | IFR(FIT) | MTBF(hour) | MSL | MSL LF |
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74LVC273BQ | SOT764-1 | Reel 7" Q1/T1 | Active | 74LVC273BQ,115 (9352 736 77115) | LVC273 | 74LVC273BQ | Always Pb-free | 123.8 | 3.87 | 2.58E8 | 1 | 1 |