74LVC273D: Octal D-type flip-flop with reset; positive-edge trigger
The 74LVC273 has eight edge-triggered, D-type flip-flops with individual Dn inputs and Qn outputs. The common clock (CP) and master reset (MR) inputs load and reset (clear) all flip-flops simultaneously. The state of each Dn input, one set-up time before the LOW-to-HIGH clock transition, is transferred to the corresponding output (Qn) of the flip-flop. All outputs will be forced LOW independently of clock or data inputs by a LOW voltage level on the MR input.
The device is useful for applications where the true output only is required and the clock and master reset are common to all storage elements.
74LVC273D: Product Block Diagram
SOT163-1
Data Sheets (1)
| Name/Description | Modified Date |
|---|---|
| Octal D-type flip-flop with reset; positive edge-trigger (REV 6.0) PDF (127.0 kB) 74LVC273 [English] | 31 Dec 2012 |
Application Notes (5)
| Name/Description | Modified Date |
|---|---|
| Sorting through the low voltage logic maze (REV 1.0) PDF (72.0 kB) AN10156 [English] | 13 Mar 2013 |
| Package lead inductance considerations in high-speed applications (REV 1.0) PDF (43.0 kB) AN212 [English] | 13 Mar 2013 |
| Pin FMEA for LVC family (REV 1.0) PDF (44.0 kB) AN11009 [English] | 04 Feb 2011 |
| Power considerations when using CMOS and BiCMOS logic devices (REV 1.0) PDF (100.0 kB) AN263 [English] | 05 Feb 2002 |
| Interfacing 3 Volt and 5 Volt Applications (REV 1.0) PDF (63.0 kB) AN240 [English] | 15 Sep 1995 |
Package Information (1)
| Name/Description | Modified Date |
|---|---|
| plastic small outline package; 20 leads; body width 7.5 mm (REV 1.0) PDF (335.0 kB) SOT163-1 [English] | 08 Feb 2016 |
Packing (1)
| Name/Description | Modified Date |
|---|---|
| SO20; Reel pack; SMD, 13" Q1/T1 Standard product orientation Orderable part number ending ,118 or J Ordering... (REV 2.0) PDF (246.0 kB) SOT163-1_118 [English] | 15 Apr 2013 |
Supporting Information (2)
| Name/Description | Modified Date |
|---|---|
| Reflow Soldering Profile (REV 1.0) PDF (34.0 kB) REFLOW_SOLDERING_PROFILE [English] | 30 Sep 2013 |
| Wave Soldering Profile (REV 1.0) PDF (20.0 kB) WAVE_SOLDERING_PROFILE [English] | 30 Sep 2013 |
IBIS Model
- lvc273 IBIS model (REV 1.0) ibs LVC273 4/7/2013
SPICE model
- lvc Spice model (REV 1.0) ZIP LVC 5/7/2013
Ordering Information
| Product | Status | Family | VCC (V) | Function | Logic switching levels | Description | Output drive capability (mA) | Package version | tpd (ns) | fmax (MHz) | Power dissipation considerations | Tamb (Cel) | Rth(j-a) (K/W) | Ψth(j-top) (K/W) | Rth(j-c) (K/W) | Package name | No of pins |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 74LVC273D | Active | LVC | 1.2 - 3.6 | D-type flip-flops | CMOS/LVTTL | positive-edge trigger | +/- 24 | SOT163-1 | 6 | 230 | low | -40~125 | 85 | 27.7 | 61 | SO20 | 20 |
Package Information
| Product ID | Package Description | Outline Version | Reflow/Wave Soldering | Packing | Product Status | Part NumberOrdering code(12NC) | Marking | Chemical Content | RoHS / Pb Free / RHF | LeadFree Conversion Date | EFR | IFR(FIT) | MTBF(hour) | MSL | MSL LF |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 74LVC273D | | SOT163-1 | Reflow_Soldering_Profile
Wave_Soldering_Profile Reflow_Soldering_Profile Wave_Soldering_Profile | Reel 13" Q1/T1 | Active | 74LVC273D,118 (9352 106 40118) | 74LVC273D | 74LVC273D |    | week 12, 2004 | 123.8 | 3.87 | 2.58E8 | 1 | 1 |
| Bulk Pack | Active | 74LVC273D,112 (9352 106 40112) | 74LVC273D | 74LVC273D | | week 12, 2004 | 123.8 | 3.87 | 2.58E8 | 1 | 1 |
- Sorting through the low voltage logic maze 74LVC_H_245A_Q100
- Package lead inductance considerations in high-speed applications 74LVC_H_245A_Q100
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- Power considerations when using CMOS and BiCMOS logic devices 74AHCT244PW
- Interfacing 3 Volt and 5 Volt Applications 74LVC377PW
- lvc273 IBIS model 74LVC273PW
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