74LVTH125DB: 3.3 V quad buffer; 3-state
The 74LVT125; 74LVTH125 is a high-performance BiCMOS product designed for VCC operation at 3.3 V.
This device combines low static and dynamic power dissipation with high speed and high output drive. The 74LVT125; 74LVTH125 device is a quad buffer that is ideal for driving bus lines. The device features four output enable inputs (1OE, 2OE, 3OEand 4OE), each controlling one of the 3-state outputs.
74LVTH125DB: Product Block Diagram
74LVTH125DB: Block Diagram
74LVTH125DB: Block Diagram
74LVTH125DB: Block Diagram
74LVTH125DB: Block Diagram
Outline 3d SOT337-1
Data Sheets (1)
| Name/Description | Modified Date |
|---|---|
| 3.3 V quad buffer; 3-state (REV 7.0) PDF (178.0 kB) 74LVT_LVTH125 [English] | 31 May 2016 |
Application Notes (7)
| Name/Description | Modified Date |
|---|---|
| Sorting through the low voltage logic maze (REV 1.0) PDF (72.0 kB) AN10156 [English] | 13 Mar 2013 |
| Package lead inductance considerations in high-speed applications (REV 1.0) PDF (43.0 kB) AN212 [English] | 13 Mar 2013 |
| Ground and VCC Bounce of High-Speed Integrated Circuits (REV 1.0) PDF (25.0 kB) AN223 [English] | 13 Mar 2013 |
| Live Insertion Aspects of Philips Logic Families (REV 1.0) PDF (73.0 kB) AN252 [English] | 13 Mar 2013 |
| Test Fixtures for High Speed Logic (REV 1.0) PDF (341.0 kB) AN203 [English] | 02 Apr 1998 |
| Transmission Lines and Terminations with Philips Advanced Logic Families (REV 1.0) PDF (217.0 kB) AN246 [English] | 01 Feb 1998 |
| LVT (Low Voltage Technology) and ALVT (Advanced LVT) (REV 1.0) PDF (133.0 kB) AN243 [English] | 01 Jan 1998 |
Selector Guides (2)
| Name/Description | Modified Date |
|---|---|
| ロジック製品セレクションガイド... (REV 1.0) PDF (38.3 MB) LOGIC_SELECTION_GUIDE_2015_JP [English] | 19 Nov 2015 |
| Logic selection guide 2016 (REV 1.1) PDF (15.3 MB) 75017285 [English] | 08 Jan 2015 |
Package Information (1)
| Name/Description | Modified Date |
|---|---|
| plastic shrink small outline package; 14 leads; body width 5.3 mm (REV 1.0) PDF (295.0 kB) SOT337-1 [English] | 08 Feb 2016 |
Packing (1)
| Name/Description | Modified Date |
|---|---|
| Standard product orientation 12NC ending 118 (REV 1.0) PDF (86.0 kB) SOT337-1_118 [English] | 04 Apr 2013 |
Supporting Information (2)
| Name/Description | Modified Date |
|---|---|
| Footprint for reflow soldering (REV 1.0) PDF (16.0 kB) SSOP-TSSOP-VSO-REFLOW [English] | 08 Oct 2009 |
| Footprint for wave soldering (REV 1.0) PDF (16.0 kB) SSOP-TSSOP-VSO-WAVE [English] | 08 Oct 2009 |
Ordering Information
| Product | Status | Family | VCC (V) | Function | Logic switching levels | Description | Output drive capability (mA) | Package version | fmax (MHz) | No of bits | Power dissipation considerations | tpd (ns) | Tamb (Cel) | Rth(j-a) (K/W) | Ψth(j-top) (K/W) | Rth(j-c) (K/W) | Package name | No of pins |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 74LVTH125DB | Active | LVT | 2.7 - 3.6 | Buffers/inverters/drivers | TTL | quad buffer/line driver with bus hold (3-state) | -32 / +64 | SOT337-1 | 150 | 4 | medium | 2.9 | -40~85 | 156 | 40.0 | SSOP14 | 14 |
Package Information
| Product ID | Package Description | Outline Version | Reflow/Wave Soldering | Packing | Product Status | Part NumberOrdering code(12NC) | Marking | Chemical Content | RoHS / Pb Free / RHF | LeadFree Conversion Date | EFR | IFR(FIT) | MTBF(hour) | MSL | MSL LF |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 74LVTH125DB | | SOT337-1 | SSOP-TSSOP-VSO-REFLOW
SSOP-TSSOP-VSO-WAVE SSOP-TSSOP-VSO-REFLOW SSOP-TSSOP-VSO-WAVE | Reel 13" Q1/T1 | Active | 74LVTH125DB,118 (9352 817 22118) | VTH125 | 74LVTH125DB |    | Always Pb-free | 70.8 | 1.33 | 7.52E8 | 1 | 1 |
| Bulk Pack | Active | 74LVTH125DB,112 (9352 817 22112) | VTH125 | 74LVTH125DB | | Always Pb-free | 70.8 | 1.33 | 7.52E8 | 1 | 1 |
- 3.3 V quad buffer; 3-state 74LVTH125PW
- Sorting through the low voltage logic maze 74LVC_H_245A_Q100
- Package lead inductance considerations in high-speed applications 74LVC_H_245A_Q100
- Ground and VCC Bounce of High-Speed Integrated Circuits 74ALVC164245DGG-Q100
- Live Insertion Aspects of Philips Logic Families 74HC_T_245_Q100
- Test Fixtures for High Speed Logic 74ABTH162245ADL
- Transmission Lines and Terminations with Philips Advanced Logic Families 74LVTN16245BDGG
- LVT (Low Voltage Technology) and ALVT (Advanced LVT) 74LVTN16245BDGG
- ロジック製品セレクションガイド... 74LVC_H_245A_Q100
- Logic selection guide 2016 74LVC_H_245A_Q100
- plastic shrink small outline package; 14 leads; body width 5.3 mm 74LVC32A_Q100
- Footprint for reflow soldering 74HC_T_595_Q100
- SSOP-TSSOP-VSO-WAVE LPC1114FDH28
- Standard product orientation 12NC ending 118 74LVC32A_Q100
- 74LVT_H_125
- 74VHC_T_125
- 74AVCM162836DGG
- 74LVT_H_125
- 74LV164
