HEF40175BT: Quad D-type flip-flop
The HEF40175B is a quad edge-triggered D-type flip-flop with four data inputs (D0 to D3), a clock input (CP), an overriding asynchronous master reset input (MR), four buffered outputs (Q0 to Q3), and four complementary buffered outputs (Q0 to Q3). Information on D0 to D3 is transferred to Q0 to Q3 on the LOW-to-HIGH transition of CP if MR is HIGH. When LOW, MR resets all flip-flops (Q0 to Q3 = LOW; Q0 to Q3 = HIGH), independent of CP and D0 to D3.
It operates over a recommended VDD power supply range of 3 V to 15 V referenced to VSS (usually ground). Unused inputs must be connected to VDD, VSS, or another input.
HEF40175BT: Product Block Diagram
sot109-1_3d
Data Sheets (1)
Name/Description | Modified Date |
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Quad D-type flip-flop (REV 9.0) PDF (158.0 kB) HEF40175B [English] | 21 Mar 2016 |
Application Notes (1)
Brochures (2)
Package Information (1)
Supporting Information (2)
Ordering Information
Product | Status | Family | Function | VCC (V) | Description | Logic switching levels | Output drive capability (mA) | Package version | tpd (ns) | fmax (MHz) | Power dissipation considerations | Tamb (Cel) | Rth(j-a) (K/W) | Ψth(j-top) (K/W) | Rth(j-c) (K/W) | Package name | No of pins |
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HEF40175BT | Active | HEF4000B | D-type flip-flops | 4.5 - 15.5 | positive-edge trigger | CMOS | +/- 2.4 | SOT109-1 | 25 | 45 | low | -40~85 | 81 | 4.7 | 39.8 | SO16 | 16 |
Package Information
Product ID | Package Description | Outline Version | Reflow/Wave Soldering | Packing | Product Status | Part NumberOrdering code(12NC) | Marking | Chemical Content | RoHS / Pb Free / RHF | LeadFree Conversion Date | EFR | IFR(FIT) | MTBF(hour) | MSL | MSL LF |
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HEF40175BT | | SOT109-1 | SO-SOJ-REFLOW
SO-SOJ-WAVE SO-SOJ-REFLOW
SO-SOJ-WAVE | Reel 13" Q1/T1 CECC | Active | HEF40175BT,653
(9333 734 70653) | HEF40175BT | HEF40175BT | | week 6, 2004 | 75.3 | 2.99 | 3.34E8 | 1 | 1 |
Bulk Pack, CECC | Active | HEF40175BT,652
(9333 734 70652) | HEF40175BT | HEF40175BT | | week 6, 2004 | 75.3 | 2.99 | 3.34E8 | 1 | 1 |