MMPF0200: 12-Channel Configurable Power Management IC
The MMPF0200 PMIC has configurable high-performance architecture for improved efficiency across the complete output range and advanced functionality for consumer, industrial and automotive applications.
The MMPF0200 is ideal for the i.MX 6SoloLite, i.MX 6Solo and i.MX 6DualLite applications processors, providing a platform-level solution from that enables faster time to market.
PF0200 Functional Internal Block Diagram
MMPF0200 Product Image
Power Management Ics - MMPF0100 and MMPF0200 Introduction
Power Management Using the MMPF0100 and MMPF0200 PMICs - Demo
Recommended Documentation (1)
| Name/Description | Type | Modified Date |
|---|---|---|
| MMPF0200, 12 Channel Configurable Power Management Integrated Circuit - Data Sheet (REV 6.0) PDF (2.3 MB) MMPF0200 | Data Sheets | 20 Mar 2015 |
Data Sheets (2)
| Name/Description | Modified Date |
|---|---|
| MMPF0200, 12 Channel Configurable Power Management Integrated Circuit - Data Sheet (REV 6.0) PDF (2.3 MB) MMPF0200 | 20 Mar 2015 |
| MMPF0200Z, 12 Channel Configurable Power Management Integrated Circuit - Data Sheet (REV 2.0) PDF (2.3 MB) MMPF0200Z | 11 Nov 2014 |
Application Notes (5)
| Name/Description | Modified Date |
|---|---|
| AN4751, Schematic Guidelines for the MMPF0200 - Application Note (REV 2.0) PDF (211.1 kB) AN4751 | 03 Jun 2015 |
| AN4622, MMPF0100 and MMPF0200 Layout Guidelines - Application Note (REV 5.0) PDF (373.8 kB) AN4622 | 02 Jun 2015 |
| AN1902, Assembly Guidelines for QFN (Quad Flat No-Lead) and DFN (Dual Flat No-Lead) Packages - Application Note (REV 7.0) PDF (3.6 MB) AN1902 | 13 Oct 2014 |
| AN4879, MMPF0200 OTP Programming Instructions - Application Note (REV 1.0) PDF (519.8 kB) AN4879 | 17 Feb 2014 |
| MMPF0100 and MMPF0200 Frequency Margining - Application Note (REV 1.0) PDF (615.5 kB) AN4840 | 18 Dec 2013 |
Fact Sheets (1)
| Name/Description | Modified Date |
|---|---|
| PMICFS, Power Management Integrated Circuits - Fact sheet (REV 0) PDF (163.7 kB) PMICFS | 15 Feb 2016 |
White Papers (1)
| Name/Description | Modified Date |
|---|---|
| PMICWP, A Case Against Discretes - White paper (REV 1) PDF (673.4 kB) PMICWP | 03 Oct 2016 |
Product Change Notices (2)
| Name/Description | Modified Date |
|---|---|
| PF0100/PF0100A and PF0200/PF0200A Devices Datasheet Update (REV 0) HTM (4.6 kB) PCN16369 | 01 Aug 2014 |
| PF0200A Datasheet Update (REV 0) HTM (17.7 kB) PCN16274 | 29 May 2014 |
Ordering Information
| Product | Status | Device Function | MCU Supported | Budgetary Price excluding tax(US$) | Package Type and Termination Count | Num. of Linear/LDO Regulators | Number of Regulators-Buck Switching | Number of Regulators-Boost Switching | Battery Charger | Interface and Input Control | Ambient Operating Temperature (Min-Max) (°C) | Additional Features - Power Management | RoHS |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MMPF0200F6AEPR2 | Active | PMICs for i.MX Processors | i.MX53, i.MX6DL, i.MX6S, i.MX6SL, i.MX6SX | 1K @ US$2.16 | QFN-EP 56 | 6 | 4 | 1 | Coin cell | I2C | -40 to 85 | [object Object] | |
| MMPF0200F0ANESR2 | Active | PMICs for i.MX Processors | i.MX53, i.MX6DL, i.MX6S, i.MX6SX | 1K @ US$2.27 | QFN-EP 56 | 6 | 4 | 1 | Coin cell | I2C | -40 to 105 | [object Object] | |
| MMPF0200F3ANES | Active | PMICs for i.MX Processors | i.MX53, i.MX6DL, i.MX6S, i.MX6SL, i.MX6SX | 1K @ US$2.27 | QFN-EP 56 | 6 | 4 | 1 | Coin cell | I2C | -40 to 85 | [object Object] | |
| MMPF0200F4ANESR2 | Active | PMICs for i.MX Processors | i.MX53, i.MX6DL, i.MX6S, i.MX6SL, i.MX6SX | 1K @ US$2.27 | QFN-EP 56 | 6 | 4 | 1 | Coin cell | I2C | -40 to 105 | [object Object] | |
| MMPF0200F3AEPR2 | Active | PMICs for i.MX Processors | i.MX53, i.MX6DL, i.MX6S, i.MX6SL, i.MX6SX | 1K @ US$2.16 | QFN-EP 56 | 6 | 4 | 1 | Coin cell | I2C | -40 to 85 | [object Object] | |
| MMPF0200F0AEPR2 | Active | PMICs for i.MX Processors | i.MX53, i.MX6DL, i.MX6S, i.MX6SX | 1K @ US$2.16 | QFN-EP 56 | 6 | 4 | 1 | Coin cell | I2C | -40 to 85 | [object Object] | |
| MMPF0200F3AEP | Active | PMICs for i.MX Processors | i.MX53, i.MX6DL, i.MX6S, i.MX6SL, i.MX6SX | 1K @ US$2.16 | QFN-EP 56 | 6 | 4 | 1 | Coin cell | I2C | -40 to 85 | [object Object] | |
| MMPF0200F6AEP | Active | PMICs for i.MX Processors | i.MX53, i.MX6DL, i.MX6S, i.MX6SL, i.MX6SX | 1K @ US$2.16 | QFN-EP 56 | 6 | 4 | 1 | Coin cell | I2C | -40 to 85 | [object Object] | |
| MMPF0200NPAZES | Active | PMICs for i.MX Processors | i.MX53, i.MX6DL, i.MX6S, i.MX6SL, i.MX6SX | 1K @ US$2.38 | QFN-EP 56 | 6 | 4 | 1 | Coin cell | I2C | -40 to 85 | [object Object] | |
| MMPF0200F3ANESR2 | Active | PMICs for i.MX Processors | i.MX53, i.MX6DL, i.MX6S, i.MX6SL, i.MX6SX | 1K @ US$2.27 | QFN-EP 56 | 6 | 4 | 1 | Coin cell | I2C | -40 to 85 | [object Object] | |
| MMPF0200F4AEPR2 | Active | PMICs for i.MX Processors | i.MX53, i.MX6DL, i.MX6S, i.MX6SL, i.MX6SX | 1K @ US$2.16 | QFN-EP 56 | 6 | 4 | 1 | Coin cell | I2C | -40 to 85 | [object Object] | |
| MMPF0200NPAEPR2 | Active | PMICs for i.MX Processors | i.MX53, i.MX6DL, i.MX6S, i.MX6SL, i.MX6SX | 1K @ US$2.16 | QFN-EP 56 | 6 | 4 | 1 | Coin cell | I2C | -40 to 85 | [object Object] | |
| MMPF0200F4AEP | Active | PMICs for i.MX Processors | i.MX53, i.MX6DL, i.MX6S, i.MX6SL, i.MX6SX | 1K @ US$2.16 | QFN-EP 56 | 6 | 4 | 1 | Coin cell | I2C | -40 to 85 | [object Object] | |
| MMPF0200NPAZESR2 | Active | PMICs for i.MX Processors | i.MX53, i.MX6DL, i.MX6S, i.MX6SL, i.MX6SX | 1K @ US$2.38 | QFN-EP 56 | 6 | 4 | 1 | Coin cell | I2C | -40 to 85 | [object Object] | |
| MMPF0200F0ANES | Active | PMICs for i.MX Processors | i.MX53, i.MX6DL, i.MX6S, i.MX6SX | 1K @ US$2.27 | QFN-EP 56 | 6 | 4 | 1 | Coin cell | I2C | -40 to 105 | [object Object] | |
| MMPF0200F0AEP | Active | PMICs for i.MX Processors | i.MX53, i.MX6DL, i.MX6S, i.MX6SX | 1K @ US$2.16 | QFN-EP 56 | 6 | 4 | 1 | Coin cell | I2C | -40 to 85 | [object Object] | |
| MMPF0200F4ANES | Active | PMICs for i.MX Processors | i.MX53, i.MX6DL, i.MX6S, i.MX6SL, i.MX6SX | 1K @ US$2.27 | QFN-EP 56 | 6 | 4 | 1 | Coin cell | I2C | -40 to 105 | [object Object] | |
| MMPF0200NPAEP | Active | PMICs for i.MX Processors | i.MX53, i.MX6DL, i.MX6S, i.MX6SL, i.MX6SX | 1K @ US$2.16 | QFN-EP 56 | 6 | 4 | 1 | Coin cell | I2C | -40 to 85 | [object Object] |
Package Information
| Package Description | Outline Version | Packing | Product Status | Part Number | Chemical Content | RoHS / Pb FreeChina RoHS Lookup | MSL | PPT (°C) |
|---|---|---|---|---|---|---|---|---|
| QFN-56 EP 8SQ*0.9 P0.5 | 98ASA00405D | MPQ - 260 TRAYPOQ - 1300 BOX | Active | MMPF0200F3AEP | MMPF0200F3AEP.pdf |   | 3 | 260 |
| MPQ - 260 TRAYPOQ - 1300 BOX | Active | MMPF0200F4AEP | MMPF0200F4AEP.pdf | | 3 | 260 | ||
| MPQ - 4000 REELPOQ - 4000 BOX | Active | MMPF0200F3AEPR2 | MMPF0200F3AEPR2.pdf | | 3 | 260 | ||
| MPQ - 4000 REELPOQ - 4000 BOX | Active | MMPF0200F4AEPR2 | MMPF0200F4AEPR2.pdf | | 3 | 260 | ||
| MPQ - 260 TRAYPOQ - 1300 BOX | Active | MMPF0200NPAEP | MMPF0200NPAEP.pdf | | 3 | 260 | ||
| MPQ - 4000 REELPOQ - 4000 BOX | Active | MMPF0200NPAEPR2 | MMPF0200NPAEPR2.pdf | | 3 | 260 | ||
| MPQ - 260 TRAYPOQ - 1300 BOX | Active | MMPF0200F0AEP | MMPF0200F0AEP.pdf | | 3 | 260 | ||
| MPQ - 4000 REELPOQ - 4000 BOX | Active | MMPF0200F0AEPR2 | MMPF0200F0AEPR2.pdf | | 3 | 260 | ||
| MPQ - 260 TRAYPOQ - 1300 BOX | Active | MMPF0200F6AEP | MMPF0200F6AEP.pdf | | 3 | 260 | ||
| MPQ - 4000 REELPOQ - 4000 BOX | Active | MMPF0200F6AEPR2 | MMPF0200F6AEPR2.pdf | | 3 | 260 | ||
| QFN-EP 56 8*8*0.9 P.5 WF | 98ASA00589D | MPQ - 260 TRAYPOQ - 1300 BOX | Active | MMPF0200NPAZES | MMPF0200NPAZES.pdf | | 3 | 260 |
| MPQ - 4000 REELPOQ - 4000 BOX | Active | MMPF0200NPAZESR2 | MMPF0200NPAZESR2.pdf | | 3 | 260 | ||
| MPQ - 260 TRAYPOQ - 1300 BOX | Active | MMPF0200F0ANES | MMPF0200F0ANES.pdf | | 3 | 260 | ||
| MPQ - 4000 REELPOQ - 4000 BOX | Active | MMPF0200F0ANESR2 | MMPF0200F0ANESR2.pdf | | 3 | 260 | ||
| MPQ - 260 TRAYPOQ - 1300 BOX | Active | MMPF0200F3ANES | MMPF0200F3ANES.pdf | | 3 | 260 | ||
| MPQ - 4000 REELPOQ - 4000 BOX | Active | MMPF0200F3ANESR2 | MMPF0200F3ANESR2.pdf | | 3 | 260 | ||
| MPQ - 260 TRAYPOQ - 1300 BOX | Active | MMPF0200F4ANES | MMPF0200F4ANES.pdf | | 3 | 260 | ||
| MPQ - 4000 REELPOQ - 4000 BOX | Active | MMPF0200F4ANESR2 | MMPF0200F4ANESR2.pdf | | 3 | 260 |
- AN4751, Schematic Guidelines for the MMPF0200 - Application Note MMPF0200
- AN4622, MMPF0100 and MMPF0200 Layout Guidelines - Application Note MMPF0200
- AN1902, Assembly Guidelines for QFN (Quad Flat No-Lead) and DFN (Dual Flat No-Lead) Packages - Application Note mc33882
- AN4879, MMPF0200 OTP Programming Instructions - Application Note MMPF0200
- MMPF0100 and MMPF0200 Frequency Margining - Application Note MMPF0200
- PMICFS, Power Management Integrated Circuits - Fact sheet MC34VR500
- PMICWP, A Case Against Discretes - White paper PF3001
- PF0100/PF0100A and PF0200/PF0200A Devices Datasheet Update MMPF0200
- PF0200A Datasheet Update MMPF0200
- 98ASA00405D MMPF0200
- MMPF0200F3AEP.pdf MMPF0200
- MMPF0200F4AEP.pdf MMPF0200
- MMPF0200F3AEPR2.pdf MMPF0200
- MMPF0200F4AEPR2.pdf MMPF0200
- MMPF0200NPAEP.pdf MMPF0200
- MMPF0200NPAEPR2.pdf MMPF0200
- MMPF0200F0AEP.pdf MMPF0200
- MMPF0200F0AEPR2.pdf MMPF0200
- MMPF0200F6AEP.pdf MMPF0200
- MMPF0200F6AEPR2.pdf MMPF0200
- 98ASA00589D MC34VR500
- MMPF0200NPAZES.pdf MMPF0200
- MMPF0200NPAZESR2.pdf MMPF0200
- MMPF0200F0ANES.pdf MMPF0200
- MMPF0200F0ANESR2.pdf MMPF0200
- MMPF0200F3ANES.pdf MMPF0200
- MMPF0200F3ANESR2.pdf MMPF0200
- MMPF0200F4ANES.pdf MMPF0200
- MMPF0200F4ANESR2.pdf MMPF0200
