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NPIC6C595BQ: Power logic 8-bit shift register; open-drain outputs

The NPIC6C595 is an 8-bit serial-in/serial or parallel-out shift register with a storage register and open-drain outputs. Both the shift and storage register have separate clocks. The device features a serial input (DS) and a serial output (Q7S) to enable cascading and an asynchronous reset input (MR). A LOW on MR resets both the shift register and storage register. Data is shifted on the LOW-to-HIGH transitions of the SHCP input. The data in the shift register is transferred to the storage register on a LOW-to-HIGH transition of the STCP input and to the Q7S output on a LOW-to-HIGH transition of the SHCP input. If both clocks are connected together, the shift register is always one clock pulse ahead of the storage register. Data in the storage register drives the gate of the output extended-drain NMOS transistor whenever the output enable input (OE) is LOW. A HIGH on OE causes the outputs to assume a high-impedance OFF-state. Operation of the OE input does not affect the state of the registers. The open-drain outputs are 33 V/100 mA continuous current extended-drain NMOS transistors designed for use in systems that require moderate load power such as LEDs. Integrated voltage clamps in the outputs provide protection against inductive transients. This feature makes the device suitable for power driver applications such as relay, solenoids and other low-current or medium-voltage loads.

NPIC6C595BQ: Product Block Diagram

Outline 3d SOT763-1

Data Sheets (1)

Brochures (2)

Selector Guides (2)

Package Information (1)

Packing (1)

Ordering Information

Package Information

Product ID	Package Description	Outline Version	Reflow/Wave Soldering	Packing	Product Status	Part NumberOrdering code(12NC)	Marking	Chemical Content	RoHS / Pb Free / RHF	LeadFree Conversion Date	MSL	MSL LF
NPIC6C595BQ		SOT763-1		Reel 7" Q1/T1	Active	NPIC6C595BQ,115 (9352 972 68115)	C6C595	NPIC6C595BQ		Always Pb-free	1	1