NPIC6C596ABQ: Power logic 8-bit shift register; open-drain outputs

The NPIC6C596A is an 8-bit serial-in/serial or parallel-out shift register with a storage register and open-drain outputs. Both the shift and storage register have separate clocks. The device features a serial input (DS) and a serial output (Q7S) to enable cascading and an asynchronous reset MR input. A LOW on MR resets both the shift register and storage register. Data is shifted on the LOW-to-HIGH transitions of the SHCP input. The data in the shift register is transferred to the storage register on a LOW-to-HIGH transition of the STCP input. If both clocks are connected together, the shift register is always one clock pulse ahead of the storage register. To provide additional hold time in cascaded applications, the serial output QS7 is clocked out on the falling edge of SHCP. Data in the storage register drives the gate of the output extended-drain NMOS (EDNMOS) transistor whenever the output enable input (OE) is LOW. A HIGH on OE causes the outputs to assume a high-impedance OFF-state. Operation of the OE input does not affect the state of the registers.

The open-drain outputs are 33 V/100 mA continuous current extended-drain NMOS transistors designed for use in systems that require moderate load power such as LEDs. Integrated voltage clamps in the outputs provide protection against inductive transients. These voltage clamps make the device suitable for power driver applications such as relays, solenoids and other low-current or medium-voltage loads.

NPIC6C596ABQ: Product Block Diagram
Outline 3d SOT763-1
Data Sheets (1)
Name/DescriptionModified Date
Power logic 8-bit shift register; open-drain outputs (REV 1.0) PDF (1.0 MB) NPIC6C596A [English]23 Oct 2013
Brochures (2)
Name/DescriptionModified Date
NXP® NPIC shift register based LED drivers (REV 2.0) PDF (523.0 kB) 75017648 [English]13 May 2015
Using shift registers to reduce size and BOM in LED designs (REV 1.0) PDF (705.0 kB) 75017624_1 [English]20 Nov 2014
Selector Guides (2)
Name/DescriptionModified Date
ロジック製品セレクションガイド... (REV 1.0) PDF (38.3 MB) LOGIC_SELECTION_GUIDE_2015_JP [English]19 Nov 2015
Logic selection guide 2016 (REV 1.1) PDF (15.3 MB) 75017285 [English]08 Jan 2015
Package Information (1)
Name/DescriptionModified Date
plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 16 terminals; body 2.5 x 3.5 x... (REV 1.1) PDF (191.0 kB) SOT763-1 [English]30 May 2016
Packing (1)
Name/DescriptionModified Date
DHVQFN16; Reel pack, SMD, 7" Q1/T1 standard product orientation Orderable part number ending ,115 or... (REV 2.0) PDF (191.0 kB) SOT763-1_115 [English]05 Jul 2016
Ordering Information
ProductStatusFamilyVCC (V)FunctionDescriptionLogic switching levelsPackage versionOutput drive capability (mA)tpd (ns)fmax (MHz)No of bitsPower dissipation considerationsTamb (Cel)Rth(j-a) (K/W)Ψth(j-top) (K/W)Rth(j-c) (K/W)Package nameNo of pins
NPIC6C596ABQActiveNPIC2.3 - 5.5Shift registers8-bit serial-in/serial or parallel-out shift register with output register LED driver (3-state)CMOSSOT763-110090108low-40~125869.054DHVQFN1616
Package Information
Product IDPackage DescriptionOutline VersionReflow/Wave SolderingPackingProduct StatusPart NumberOrdering code(12NC)MarkingChemical ContentRoHS / Pb Free / RHFLeadFree Conversion DateMSLMSL LF
NPIC6C596ABQSOT763-1Reel 7" Q1/T1ActiveNPIC6C596ABQX (9353 024 07115)Standard MarkingNPIC6C596ABQAlways Pb-free11
Power logic 8-bit shift register; open-drain outputs NPIC6C596APW
NXP® NPIC shift register based LED drivers NPIC6C596A_Q100
Using shift registers to reduce size and BOM in LED designs NPIC6C596PW
ロジック製品セレクションガイド... 74LVC_H_245A_Q100
Logic selection guide 2016 74LVC_H_245A_Q100
plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 16 terminals; body 2.5 x 3.5 x... NPIC6C596A_Q100
DHVQFN16; Reel pack, SMD, 7" Q1/T1 standard product orientation Orderable part number ending ,115 or... NPIC6C596A_Q100
74AVCM162836DGG
TFF1024HN