The PCA9554 and PCA9554A are 16-pin CMOS devices that provide 8 bits of General Purpose parallel Input/Output (GPIO) expansion for I²C-bus/SMBus applications and were developed to enhance the NXP® Semiconductors family of I²C-bus I/O expanders. The improvements include higher drive capability, 5 V I/O tolerance, lower supply current, individual I/O configuration, 400 kHz clock frequency, and smaller packaging. I/O expanders provide a simple solution when additional I/O is needed for ACPI power switches, sensors, push buttons, LEDs, fans, and so on.
The PCA9554/PCA9554A consist of an 8-bit Configuration register (Input or Output selection); 8-bit Input Port register, 8-bit Output Port register and an 8-bit Polarity Inversion register (active HIGH or active LOW operation). The system master can enable the I/Os as either inputs or outputs by writing to the I/O configuration bits. The data for each input or output is kept in the corresponding Input Port or Output Port register. The polarity of the read register can be inverted with the Polarity Inversion register. All registers can be read by the system master. Although pin-to-pin and I²C-bus address compatible with the PCF8574 series, software changes are required due to the enhancements and are discussed in Application Note AN469.
The PCA9554/PCA9554A open-drain interrupt output is activated when any input state differs from its corresponding Input Port register state and is used to indicate to the system master that an input state has changed. The power-on reset sets the registers to their default values and initializes the device state machine.
Three hardware pins (A0, A1, A2) vary the fixed I²C-bus address and allow up to eight devices to share the same I²C-bus/SMBus. The PCA9554A is identical to the PCA9554 except that the fixed I²C-bus address is different allowing up to sixteen of these devices (eight of each) on the same I²C-bus/SMBus.
Name/Description | Modified Date |
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8-bit I2C-bus and SMBus I/O port with interrupt (REV 9.0) PDF (585.0 kB) PCA9554_9554A | 19 Mar 2013 |
Name/Description | Modified Date |
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I2C-bus specification and user manual (REV 6.0) PDF (1.4 MB) UM10204 | 28 Apr 2014 |
I2C-bus specification and user manual (REV 5.0) PDF (1.6 MB) UM10204_JA | 03 Apr 2013 |
I2C Demonstration Board 2005-1 Quick Start Guide (REV 1.0) PDF (261.0 kB) UM10206 | 13 Jun 2006 |
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NXP® I2C-bus solutions 2014: Smart, simple solutions for the 12 most common design concerns (REV 1.0) PDF (3.5 MB) 75017540 | 01 Aug 2014 |
Product | Status | No of bits | VDD [min] (V) | VDD [max] (V) | Over volt tolerant | No of supplies | Standby current [typ] (µA) | Max Sink Current per bit (mA) | Max Sink Current, per package (mA) | Source Current per bit (mA) | Interrupt output pin | Reset input pin | Output mode | Input mode: invert option | Internal pull-up resistor per bit (kOhm) | I2C-bus (kHz) | Footprint body and leads (mm2) | Package name | Package version | Operating Temperature (Cel) | No of Addresses | Remark |
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PCA9554U | End of Life | 25 | 100 | 10 | 400 | NAU000 | NAU000 | -40~85 | 8 |