SDIO101AIHR: SD/SDIO/MMC/CE-ATA host controller

The SDIO101A is a SD/SDIO/MMC/CE-ATA host controller with a standard 16-bit asynchronous memory interface. The device conforms to the SD Host Standard Specification Version 2.0. The SDIO101A manages the physical layer of SD, SDIO, MMC and CE-ATA protocols and can be used together with SD Host Standard compatible driver software to add SD/SDIO/MMC/CE-ATA host functionality to a variety of microprocessor systems.

The SDIO101A supports both full-speed (< 25 MHz) and high-speed (< 52 MHz) data transmissions on the SD/SDIO/MMC/CE-ATA port. The SDIO101A offers separate pins for SD/SDIO/MMC/CE-ATA port supply voltage, host interface supply voltage and core supply voltage. The SD/SDIO/MMC/CE-ATA port can operate at a wide voltage range (1.8 V to 3.6 V) which allows the device to interface to a large variety of SD, SDIO, MMC or CE-ATA devices. The SDIO101A allows 1-bit and 4-bit SD transactions and 8-bit MMC/CE-ATA transactions. The 16-bit asynchronous memory interface can operate at a 2.5 V to 3.6 V voltage range.

A built-in, 2 kB data buffer allows for a low interrupt latency time and efficient communication with the host processor at high data rates. The SDIO101A provides a DMA request line that can be connected to an external DMA controller to off-load the host processor and increase overall system performance.

An on-board PLL allows a large range of SD/SDIO/MMC/CE-ATA clock speeds to be generated from a single externally available clock source. An additional fractional divider allows the SD clock speed to be fine-tuned with very fine granularity, which enables the user to achieve the maximum desired SD clock speed from the external clock source.

The SDIO101A offers 5 levels of power saving, including a ‘Hibernate mode’ where the on-board oscillator, PLL and data buffer memories are switched off, and a ‘Coma mode’ in which supply power to most of the device is internally switched off. This allows the device to be used in very power-critical applications.

sot1133-2_3d
Data Sheets (1)
Name/DescriptionModified Date
SD/SDIO/MMC/CE-ATA host controller (REV 1.0) PDF (657.0 kB) SDIO101A13 Jun 2013
Package Information (1)
Name/DescriptionModified Date
plastic compatible thermal enhanced extremely thin quad flat package; no leads; 60 terminals (REV 1.0) PDF (150.0 kB) SOT1133-208 Feb 2016
Ordering Information
ProductStatusStatusBudgetary Price excluding tax(US$)Package Type and Termination CountGPIOsQualification Tier
SDIO101AIHREnd of Life
Package Information
Product IDPackage DescriptionOutline VersionReflow/Wave SolderingPackingProduct StatusPart NumberOrdering code(12NC)MarkingChemical ContentRoHS / Pb Free / RHFLeadFree Conversion DateMSLMSL LF
SDIO101AIHRSOT1133-2Tray, Bakeable, Single in DrypackDiscontinuedSDIO101AIHRE (9353 002 81551)Standard MarkingSDIO101AIHRAlways Pb-free22
Reel 7" Q1/T1 in DrypackDiscontinuedSDIO101AIHRZ (9353 002 81515)Standard MarkingSDIO101AIHRAlways Pb-free22
SD/SDIO/MMC/CE-ATA host controller sdio101aihr
plastic compatible thermal enhanced extremely thin quad flat package; no leads; 60 terminals SDIO101AIHR