VR5100: Multi-output DC-DC regulator for Low Power LS1 Communication Processors

The VR5100 is a high performance, multi-output DC-DC regulator designed to power single or dual core LS1 processors like LS1012A and LS1024A. It includes three buck regulators, six LDOs and a boost regulator offering a complete power management solution for Network Attached Storage, battery operated Mobile NAS, IoT gateway, Home and factory automation systems.

The VR5100 uses a low quiescent current architecture allowing high efficiency operation at light load extending the battery life. The high frequency operation reduces the total solution to less than 0.5 sqin. The high power QFN package keeps the junction temperature low even at high ambient temperature.

VR5100 Multi-output DC-DC regulator Block Diagram
VR5100 Multi-output DC-DC regulator
特性
  • Three adjustable high efficiency buck regulators: 3.8 A, 1.25 A, 1.5 A
    • Selectable modes: PWM, PFM, APS
  • Selectable modes: PWM, PFM, APS
  • 5.0 V, 600 mA boost regulator with PFM or Auto mode
  • Six adjustable general purpose linear regulators
  • Input voltage range: 2.8 V to 4.5 V
  • OTP (One Time Programmable) memory for device configuration
    • Programmable start-up sequence and timing
    • Selectable output voltage, frequency, soft start
  • Programmable start-up sequence and timing
  • Selectable output voltage, frequency, soft start
  • I2C control
  • Always ON RTC supply and Coin cell charger
  • DDR reference voltage
  • -40 °C to +125 °C operating junction temperature
Data Sheets (1)
Name/DescriptionModified Date
VR5100, Multi-output DC/DC Regulator for Low Power LS1 Communication Processors - Data Sheet (REV 3.0) PDF (3.0 MB) VR5100DS03 Mar 2016
Application Notes (1)
Name/DescriptionModified Date
AN5283, VR5100 layout guidelines - Application Note (REV 1.0) PDF (613.8 kB) AN528321 Apr 2016
Fact Sheets (1)
Name/DescriptionModified Date
PMICFS, Power Management Integrated Circuits - Fact sheet (REV 0) PDF (163.7 kB) PMICFS15 Feb 2016