74LVC126: Low-Voltage CMOS Quad Buffer, 3-State
The 74LVC126A is a high performance, non−inverting quad buffer operating from a 1.2 to 3.6 V supply. High impedance TTL compatible inputs significantly reduce current loading to input drivers while TTL compatible outputs offer improved switching noise performance. A VI specification of 5.5 V allows 74LVC126A inputs to be safely driven from 5.0 V devices. The 74LVC126A is suitable for memory address driving and all TTL level bus oriented transceiver applications.Current drive capability is 24 mA at the outputs. The Output Enable (OEn) inputs, when HIGH, disable the outputs by placing them in a HIGH Z condition.
Features- Designed for 1.2 to 3.6 V VCC Operation
- 5.0 V Tolerant − Interface Capability With 5.0 V TTL Logic
- Supports Live Insertion and Withdrawal
- IOFF Specification Guarantees High Impedance When VCC = 0 V
- 24 mA Output Sink and Source Capability
- Near Zero Static Supply Current in all Three Logic States (10 µA) Substantially Reduces System Power Requirements
- Latchup Performance Exceeds 250 mA
- ESD Performance: Human Body Model >2000 V; Machine Model >200 V
- These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant
|
Data Sheets (1)
Package Drawings (2)
Order Information
| Product | Status | Compliance | Package | MSL* | Container | Budgetary Price/Unit |
|---|
| 74LVC126ADR2G | Active | Pb-free
Halide free | SOIC-14 | 751A-03 | 1 | Tape and Reel | 2500 | $0.0733 |
| 74LVC126ADTR2G | Active | Pb-free
Halide free | TSSOP-14 | 948G-01 | 1 | Tape and Reel | 2500 | $0.0733 |
Specifications
| Product | Channels | Output | VCC Min (V) | VCC Max (V) | tpd Max (ns) | IO Max (mA) |
|---|
| 74LVC126ADR2G | 4 | 3-State | 1.2 | 3.6 | 6 | 24 |
| 74LVC126ADTR2G | 4 | 3-State | 1.2 | 3.6 | 6 | 24 |
