MC100EL13: Clock / Data Fanout Buffer, 1:3 Differential, ECL, 5.0 V
The MC100EL13 is a dual, fully differential 1:3 fanout buffer. The Low Output-Output Skew of the device makes it ideal for distributing two different frequency synchronous signals. The differential inputs have special circuitry which ensures device stability under open input conditions. When both differential inputs are left open the D input will pull down to VEE , The Dbar input will bias around VCC/2 and the Q output will go LOW.
Features- 500 ps Typical Propagation Delays
- 50 ps Output-Output Skews
- ESD Protection: > 2 KV HBM, > 100 V MM
- The 100 Series Contains Temperature Compensation
- PECL Mode Operating Range: VCC = 4.2 V to 5.7 V with VEE = 0 V
- NECL Mode Operating Range: VCC = 0 V with VEE = -4.2 V to -5.7 V
- Internal Input Pulldown Resistors
- Q Output will Default LOW with Inputs Open or at VEE
- Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
- Flammability Rating: UL-94 code V-0 @ 1/8", Oxygen Index 28 to 34
- Transistor Count = 143 devices
- Pb-Free Packages are Available
|
Application Notes (17)
Data Sheets (1)
Simulation Models (2)
Package Drawings (1)
Document Title | Document ID/Size | Revision |
---|
SOIC-20 WB | 751D-05 (36.3kB) | H |
Order Information
Product | Status | Compliance | Package | MSL* | Container | Budgetary Price/Unit |
---|
MC100EL13DWG | Active | Pb-free
Halide free | SOIC-20W | 751D-05 | 3 | Tube | 38 | Contact BDTIC |
Specifications
Product | Type | Channels | Input / Output Ratio | Input Level | Output Level | VCC Typ (V) | tJitterRMS Typ (ps) | tskew(o-o) Max (ps) | tpd Typ (ns) | tR & tF Max (ps) | fmaxClock Typ (MHz) | fmaxData Typ (Mbps) |
---|
MC100EL13DWG | Buffer | 2 | 1:3 | ECL | ECL | 5 | 0.2 | 50 | 0.525 | 500 | 1000 | |