MC100EL14: Clock Fanout Buffer, 1:5 ECL, 5.0 V
The MC100EL14 is a low skew 1:5 clock distribution chip designed explicitly for low skew clock distribution applications. The BB pin, an internally generated voltage supply, is available to this device only. For single-ended input conditions, the unused differential input is connected to VBB as a switching reference voltage. VBB may also rebias AC coupled inputs. When used, decouple VBB and VCC via a 0.01 F capacitor and limit current sourcing or sinking to 0.5 mA. When not used, VBB should be left open.The EL14 features a multiplexed clock input to allow for the distribution of a lower speed scan or test clock along with the high speed system clock. When LOW (or left open and pulled LOW by the input pulldown resistor) the SEL pin will select the differential clock input.The common enable (EN) is synchronous so that the outputs will only be enabled/disabled when they are already in the LOW state. This avoids any chance of generating a runt clock pulse when the device is enabled/disabled as can happen with an asynchronous control. The internal flip flop is clocked on the falling edge of the input clock, therefore all associated specification limits are referenced to the negative edge of the clock input.
特性- 50 ps Output-to-Output Skew
- Synchronous Enable/Disable
- Multiplexed Clock Input
- ESD Protection: > 2 KV HBM, > 200 V MM
- The 100 Series Contains Temperature Compensation
- PECL Mode Operating Range: VCC = 4.2 V to 5.7 V with VEE = 0 V
- NECL Mode Operating Range: VCC = 0 V with VEE = -4.2 V to -5.7 V
- Internal Input Pulldown Resistors on CLK, SCLK, SEL, and ENbar.
- Q Output will Default LOW with Inputs Open or at VEE
- Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
- Flammability Rating: UL-94 code V-0 @ 1/8", Oxygen Index 28 to 34
- Transistor Count = 303 devices
- Pb-Free Packages are Available
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应用注释 (17)
数据表 (1)
仿真模型 (1)
封装图纸 (1)
Document Title | Document ID/Size | Revision |
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SOIC-20 WB | 751D-05 (36.3kB) | H |
产品订购型号
产品 | 状况 | Compliance | 具体说明 | 封装 | MSL* | 容器 | 预算价格 (1千个数量的单价) |
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MC100EL14DWG | Active | Pb-free
Halide free | Clock Fanout Buffer, 1:5 ECL, 5.0 V | SOIC-20W | 751D-05 | 3 | Tube | 38 | 联系BDTIC |
MC100EL14DWR2G | Active | Pb-free
Halide free | Clock Fanout Buffer, 1:5 ECL, 5.0 V | SOIC-20W | 751D-05 | 3 | Tape and Reel | 1000 | 联系BDTIC |
订购产品技术参数
Product | Type | Channels | Input / Output Ratio | Input Level | Output Level | VCC Typ (V) | tJitterRMS Typ (ps) | tskew(o-o) Max (ps) | tpd Typ (ns) | tR & tF Max (ps) | fmaxClock Typ (MHz) | fmaxData Typ (Mbps) |
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MC100EL14DWG | Buffer | 1 | 1:5 | ECL | ECL | 5 | 1 | 50 | 0.68 | 500 | 1000 | |
MC100EL14DWR2G | Buffer | 1 | 1:5 | ECL | ECL | 5 | 1 | 50 | 0.68 | 500 | 1000 | |