The MC10EL/100EL31 is a D flip-flop with set and reset. The device is functionally equivalent to the E131 device with higher performance capabilities. With propagation delays and output transition times significantly faster than the E131 the EL31 is ideally suited for those applications which require the ultimate in AC performance. Both set and reset inputs are asynchronous, level triggered signals. Data enters the master portion of the flip-flop when clock is LOW and is transferred to the slave, and thus the outputs, upon a positive transition of the clock.The 100 Series contains temperature compensation.
Features
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Document Title | Document ID/Size | Revision | Revision Date |
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5 V ECL D Flip-Flop With Set and Reset | MC10EL31/D (141kB) | 7 | Jul, 2016 |
Document Title | Document ID/Size | Revision | Revision Date |
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IBIS Model for MC100EL31D | MC100EL31D.IBS (10.0kB) |
Document Title | Document ID/Size | Revision |
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SOIC-8 Narrow Body | 751-07 (62.6kB) | AK |
TSSOP 8 3.0x3.0x0.95 mm | 948R-02 (77.3kB) | A |
Product | Status | Compliance | Package | MSL* | Container | Budgetary Price/Unit | ||
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MC100EL31DG | Active | Pb-free | SOIC-8 | 751-07 | 1 | Tube | 98 | Contact BDTIC |
MC100EL31DR2G | Lifetime | Pb-free | SOIC-8 | 751-07 | 1 | Tape and Reel | 2500 | |
MC100EL31DTG | Active | Pb-free Halide free | TSSOP-8 | 948R-02 | 3 | Tube | 100 | Contact BDTIC |
Product | Type | Bits | Input Level | Output Level | VCC Typ (V) | tJitter Typ (ps) | tpd Typ (ns) | tsu Min (ns) | th Min (ns) | trec Typ (ns) | tR & tF Max (ps) | fToggle Typ (MHz) |
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MC100EL31DG | D-Type | 1 | ECL | ECL | 5 | 1 | 0.475 | 0.15 | 0.25 | 0.2 | 350 | 2800 |
MC100EL31DTG | D-Type | 1 | ECL | ECL | 5 | 1 | 0.475 | 0.15 | 0.25 | 0.2 | 350 | 2800 |