MC14569B: Programmable Divide-By-N Dual 4-Bit Binary/BCD Down Counter
The MC14569B is a programmable divide-by-N dual 4-bit binary or BCD down counter constructed with MOS P-channel and N-channel enhancement mode devices (complementary MOS) in a monolithic structure. This device has been designed for use with the MC14568B phase comparator/counter in frequency synthesizers, phase-locked loops, and other frequency division applications requiring low power dissipation and/or high noise immunity.
Features- Speed-up Circuitry for Zero Detection
- Each 4-Bit Counter Can Divide Independently in BCD or Binary Mode
- Can be Cascaded With MC14526B for Frequency Synthesizer Applications
- All Outputs are Buffered
- Schmitt Triggered Clock Conditioning
- Pb-Free Packages are Available*
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Simulation Models (2)
Package Drawings (1)
| Document Title | Document ID/Size | Revision |
|---|
| SO-16 WB | 751G-03 (56.7kB) | D |
Data Sheets (1)
Order Information
| Product | Status | Compliance | Package | MSL* | Container | Budgetary Price/Unit |
|---|
| MC14569BDWG | Active | Pb-free
Halide free | SOIC-16W | 751G-03 | 3 | Tube | 47 | $1.4666 |
| MC14569BDWR2G | Active | Pb-free
Halide free | SOIC-16W | 751G-03 | 3 | Tape and Reel | 1000 | $1.4666 |
| NLV14569BDWR2G | Active, Not Rec | AEC Qualified
PPAP Capable
Pb-free
Halide free | SOIC-16W | 751G-03 | 1 | Tape and Reel | 1000 | $1.6133 |
Specifications
| Product | Type | VCC Min (V) | VCC Max (V) | tpd Max (ns) | PD Max (W) | IO Max (mA) |
|---|
| MC14569BDWG | Counter | 3 | 18 | 500 | 0.5 | 2.25 |
| MC14569BDWR2G | Counter | 3 | 18 | 500 | 0.5 | 2.25 |
