MC74ACT74: Dual D-Type Positive Edge-Triggered Flip-Flop
The MC74AC74/74ACT74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary (Q,Q) outputs. Information at the input is transferred to the outputs on the positive edge of the clock pulse. Clock triggering occurs at a voltage level of the clock pulse and is not directly related to the transition time of the positive-going pulse. After the Clock Pulse input threshold voltage has been passed, the Data input is locked out and information present will not be transferred to the outputs until the next rising edge of the Clock Pulse input. Asynchronous Inputs: LOW input to SD (Set) sets Q to HIGH level LOW input to CD (Clear) sets Q to LOW level Clear and Set are independent of clock Simultaneous LOW on CD and SD makes both Q and Q HIGH
Features- Outputs Source/Sink 24 mA
- ACT74 Has TTL Compatible Inputs CD1SD2 D1Q1CP2 Q2
- Pb-Free Packages Are Available
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Packages
Application Notes (1)
Data Sheets (1)
Simulation Models (2)
Package Drawings (2)
Order Information
| Product | Status | Compliance | Package | MSL* | Container | Budgetary Price/Unit |
|---|
| MC74ACT74DG | Active | Pb-free
Halide free | SOIC-14 | 751A-03 | 1 | Tube | 55 | $0.1735 |
| MC74ACT74DR2G | Active | Pb-free
Halide free | SOIC-14 | 751A-03 | 1 | Tape and Reel | 2500 | $0.1735 |
| MC74ACT74DTR2G | Active | Pb-free
Halide free | TSSOP-14 | 948G-01 | 1 | Tape and Reel | 2500 | $0.1911 |
Specifications
| Product | Type | Channels | VCC Min (V) | VCC Max (V) | tpd Max (ns) | IO Max (mA) |
|---|
| MC74ACT74DG | D-Type | 2 | 4.5 | 5.5 | 10 | 24 |
| MC74ACT74DR2G | D-Type | 2 | 4.5 | 5.5 | 10 | 24 |
| MC74ACT74DTR2G | D-Type | 2 | 4.5 | 5.5 | 10 | 24 |
