MC74VHC1GT125: Single Non-Inverting Buffer, 3-State

The MC74VHC1GT125 is a single gate noninverting buffer fabricated with silicon gate CMOS technology. It achieves high speed operation similar to equivalent Bipolar Schottky TTL while maintaining CMOS low power dissipation. The MC74VHC1GT125 requires the 3-state control input (OE(bar)) to be set High to place the output into the high impedance state. The device input is compatible with TTL-type input thresholds and the output has a full 5V CMOS level output swing. The input protection circuitry on this device allows overvoltage tolerance on the input, allowing the device to be used as a logic-level translator from 3.0V CMOS logic to 5.0V CMOS Logic or from 1.8V CMOS logic to 3.0V CMOS Logic while operating at the high-voltage power supply. The MC74VHC1GT125 input structure provides protection when voltages up to 7V are applied, regardless of the supply voltage. This allows the MC74VHC1GT125 to be used to interface 5V circuits to 3V circuits. The output structures also provide protection when VCC = 0V. These input and output structures help prevent device destruction caused by supply voltage - input/output voltage mismatch, battery backup, hot insertion, etc.

Features
  • High Speed: tPD = 3.5ns (Typ) at VCC = 5V
  • Low Power Dissipation: ICC= 1µA (Max) at TA = 25°C
  • TTL-Compatible Inputs: VIL = 0.8 V; VIH = 2.0 V
  • CMOS-Compatible Outputs: VOH > 0.8 VCC ; VOL < 0.1 VCC @Load
  • Power Down Protection Provided on Inputs and Outputs
  • Balanced Propagation Delays
  • Pin and Function Compatible with Other Standard Logic Families
  • Chip Complexity:FETs = 62; Equivalent Gates = 16
  • Pb-Free Packages are Available
Application Notes (1)
Document TitleDocument ID/SizeRevisionRevision Date
Unique One Gates Make Voltage Bilateral Level Translation SimpleAND8096/D (18.0kB)0
Data Sheets (1)
Document TitleDocument ID/SizeRevisionRevision Date
Non-Inverting Buffer / CMOS Logic Level ShifterMC74VHC1GT125/D (132.0kB)14
Simulation Models (1)
Document TitleDocument ID/SizeRevisionRevision Date
MC74VHC1GT125 Ibis ModelMC74VHC1GT125 (62.0kB)0
Package Drawings (2)
Document TitleDocument ID/SizeRevision
SC-88A (SC-70-5 / SOT-353)419A-02 (58.5kB)L
TSOP-5483 (32.5kB)M
Order Information
ProductStatusCompliancePackageMSL*ContainerBudgetary Price/Unit
M74VHC1GT125DF1GActivePb-free Halide freeSC-88A-5 / SC-70-5 / SOT-323-5419A-021Tape and Reel3000$0.0867
M74VHC1GT125DF2GActivePb-free Halide freeSC-88A-5 / SC-70-5 / SOT-323-5419A-021Tape and Reel3000$0.0867
M74VHC1GT125DT1GActivePb-free Halide freeTSOP-5 / SOT-23-54831Tape and Reel3000$0.1333
NLVVHC1GT125DF1GActiveAEC Qualified PPAP Capable Pb-free Halide freeSC-88A-5 / SC-70-5 / SOT-323-5419A-021Tape and Reel3000$0.1333
NLVVHC1GT125DF2GActiveAEC Qualified PPAP Capable Pb-free Halide freeSC-88A-5 / SC-70-5 / SOT-323-5419A-021Tape and Reel3000$0.1333
NLVVHC1GT125DT1GActiveAEC Qualified PPAP Capable Pb-free Halide freeTSOP-5 / SOT-23-54831Tape and Reel3000Contact BDTIC
Specifications
ProductChannelsOutputVCC Min (V)VCC Max (V)tpd Max (ns)IO Max (mA)
M74VHC1GT125DF1G13-State35.57.58
M74VHC1GT125DF2G13-State35.57.58
M74VHC1GT125DT1G13-State35.57.58
NLVVHC1GT125DF1G13-State35.57.58
NLVVHC1GT125DF2G13-State35.57.58
NLVVHC1GT125DT1G13-State35.57.58
Non-Inverting Buffer / CMOS Logic Level Shifter (132.0kB) MC74VHC1GT125
Unique One Gates Make Voltage Bilateral Level Translation Simple MC74VHC1GT125
MC74VHC1GT125 Ibis Model MC74VHC1GT125
SC-88A (SC-70-5 / SOT-353) NZF220DFT1
TSOP-5 NUP4004M5