NB3H63143G: 3.3 V / 2.5 V One Time Programmable OmniClock Generator with Single-Ended (LVCMOS/LVTTL) and Differential (LVPECL/LVDS/HCSL/CML) Outputs with Individual Output Enable and Individual VDDO
The NB3H63143G, which is a member of the OmniClock family, is a one−time programmable (OTP), low power PLL−based clock generator that supports any output frequency from 8 kHz to 200 MHz. The device accepts fundamental mode parallel resonant crystal or a single ended (LVCMOS/LVTTL) reference clock
as input. It generates either three single ended (LVCMOS/LVTTL)
outputs, or one single ended output and one differential
(LVPECL/LVDS/HCSL/CML) output. The output signals can be
modulated using the spread spectrum feature of the PLL
(programmable spread spectrum type, deviation and rate) for
applications demanding low electro−magnetic interference (EMI).
Individual output enable pins OE[2:0] are available to enable/disable
the outputs. Individual output voltage pins VDDO[2:0] are available
to independently set the output voltage of each output. Up to four
different configurations can be written into the device memory. Two
selection pins (SEL[1:0]) allow the user to select the configuration to
use. Using the PLL bypass mode, it is possible to get a copy of the
input clock on any or all of the outputs. The device can be powered
down using the Power Down pin (PD#). It is possible to program the
internal input crystal load capacitance and the output drive current
provided by the device. The device also has automatic gain control
(crystal power limiting) circuitry which avoids the device overdriving
the external crystal.
Features- Member of the OmniClock Family of Programmable Clock Generators
- Operating Power Supply: 3.3 V ±10%, 2.5 V ±10%
- I/O Standards ♦ Inputs: LVCMOS/LVTTL, Fundamental Mode Crystal ♦ Outputs: 1.8 V to 3.3 V LVCMOS/LVTTL ♦ Outputs: LVPECL, LVDS, HCSL and CML
- 3 Programmable Single Ended (LVCMOS/LVTTL) Outputs from 8 kHz to 200 MHz
- 1 Programmable Differential Clock Output up to 200 MHz
- Input Frequency Range ♦ Crystal: 3 MHz to 50 MHz ♦ Reference Clock: 3 MHz to 200 MHz
- Configurable Spread Spectrum Frequency Modulation Parameters (Type, Deviation, Rate)
- Individual Output Enable Pins
- Independent Output Voltage Pins
- Programmable Internal Crystal Load Capacitors
- Programmable Output Drive Current for Single Ended Outputs
- Power Saving Mode through Power Down Pin
- Programmable PLL Bypass Mode
- Programmable Output phase Inversion
- Packaged in 16−pin QFN
- Pb−Free Devices
|
Applications- Consumer
- Industrial Equipment
- Computing and Peripherals
- Portable equipment
| End Products- Smart Wearables
- Smart Phones
- Digital Cameras
- Camcorders
- Set Top Boxes
- Printers
- eBooks
- Media Players
|
Software (1)
Package Drawings (1)
Simulation Models (1)
Data Sheets (1)
Evaluation Board Documents (4)
Evaluation/Development Tool Information
| Product | Status | Compliance | Short Description |
|---|
| NB3X6X1XXG16QFNEVK | Active | Pb-free | One Time Programmable Clock Generator Evaluation Kit for 16 lead QFN Package |
Order Information
| Product | Status | Compliance | Package | MSL* | Container | Budgetary Price/Unit |
|---|
| NB3H63143G00MNR2G | Active | Pb-free
Halide free | QFN-16 | 485AE | 1 | Tape and Reel | 3000 | Contact BDTIC |
Specifications
| Product | Input Level | Output Level | VS Typ (V) | fin Typ (MHz) | fout Typ (MHz) | tJitter(Cy-Cy) Typ (ps) | tJitter(Period) Typ (ps) | tJitter(Φ) Typ (ps) | tR & tF Typ (ps) | tR & tF Max (ps) | TA Min (°C) | TA Max (°C) |
|---|
| NB3H63143G00MNR2G | Crystal
LVCMOS | LVPECL
HCSL
CML
LVDS
LVCMOS | 3.3
2.5 | 3 MHz to 200 MHz (Reference clock)
3 MHz to 50 MHz (Crystal) | 0.008 to 200 | 100 | 100 | | 1000 | 700 | -40 | 85 |
