NB4N840M: 2 x 2 Crosspoint Switch, Dual, 3.3 V, 3.2 Gb / s, with CML Outputs

The NB4N840M is a high−bandwidth fully differential dual 2 x 2 crosspoint switch with CML inputs/outputs that is suitable for applications such as SDH/SONET DWDM and high speed switching. Fully differential design techniques are used to minimize jitter accumulation, crosstalk, and signal skew, which make this device ideal for loop−through and protection channel switching applications. Internally terminated differential CML inputs accept AC−coupled LVPECL (Positive ECL) or direct coupled CML signals. By providing internal 50 Ohm input and output termination resistor, the need for external components is eliminated and interface reflections are minimized. Differential 16 mA CML outputs provide matching internal 50 Ohm terminations, and 400 mV output swings when externally terminated, 50 Ohm to VCC. Single−ended LVCMOS/LVTTL SEL inputs control the routing of the signals through the crosspoint switch which makes this device configurable as 1:2 fan−out, repeater or 2 x 2 crosspoint switch. The device is housed in a low profile 5 x 5 mm 32−pin QFN package.

Features
  • Plugin compatible to the MAX3840 and SY55859L
  • Maximum Input Clock Frequency 2.7 GHz
  • Maximum Input Data Frequency 3.2 Gb/s
  • 225 ps Typical Propagation Delay
  • 80 ps Typical Rise and Fall Times
  • 7 ps Channel to Channel Skew
  • 430 mW Power Consumption
  • < 0.5 ps RMS Jitter
  • 7 ps PeaktoPeak Data Dependent Jitter
  • Power Saving Feature with Disabled Outputs
  • Operating Range: VCC = 3.0 V to 3.6 V with VEE = 0 V
  • CML Output Level (400 mV PeaktoPeak Output), Differential Output
  • These are Pb-Free Devices
Applications
  • OC-3 to OC-48 Line or System Loopback
  • Redundant Data Fan-out
Application Notes (9)
Document TitleDocument ID/SizeRevisionRevision Date
AC Characteristics of ECL DevicesAND8090/D (896.0kB)1
Board Mounting Notes for Quad Flat-Pack No-Lead Package (QFN)AND8086/D (40.0kB)0
Clock Generation and Clock and Data Marking and Ordering Information GuideAND8002/D (71kB)12
ECL Clock Distribution TechniquesAN1405/D (54.0kB)1
ECLinPS Plus™ Spice Modeling KitAND8009/D (343.0kB)11
Interfacing with ECLinPSAND8066/D (72kB)3
Termination and Interface of ON Semiconductor ECL Logic Devices with CML (Current Mode Logic) Output StructureAND8173/D (144.0kB)3
Termination of ECL Logic DevicesAND8020/D (176.0kB)6
Thermal Analysis and Reliability of WIRE BONDED ECLAND8072/D (119.0kB)5
Package Drawings (1)
Document TitleDocument ID/SizeRevision
QFN32, 5x5, 0.5P, 3.1x3.1EP488AM (57.4kB)A
Simulation Models (2)
Document TitleDocument ID/SizeRevisionRevision Date
ECLinPS Plus SPICE Modeling KitAND8009 (343.0kB)11
IBIS Model for nb4n840mNB4N840M.IBS (36.0kB)1
Evaluation Board Documents (2)
Document TitleDocument ID/SizeRevisionRevision Date
NB4N840MMNEVB Gerber Layout Files (Zip Format)NB4N840MMNEVB_GERBER.ZIP (480.0kB)0
NB4N840MMNEVB ManualEVBUM2078/D (362.0kB)2
Data Sheets (1)
Document TitleDocument ID/SizeRevisionRevision Date
2 x 2 Crosspoint Switch, Dual, 3.3 V, 3.2 Gb / s, with CML OutputsNB4N840M/D (102kB)5
Evaluation/Development Tool Information
ProductStatusComplianceShort Description
NB4N840MMNEVBActiveDual 2x2 Crosspoint Switch Evaluation Board
Order Information
ProductStatusCompliancePackageMSL*ContainerBudgetary Price/Unit
NB4N840MMNGActivePb-free Halide freeQFN-32488AM1Tube74Contact BDTIC
NB4N840MMNR4GActivePb-free Halide freeQFN-32488AM1Tape and Reel1000Contact BDTIC
NB4N840MMNTWGActivePb-free Halide freeQFN-32488AM1Tape and Reel1000$7.25
Specifications
ProductInput/Output RatioChannelsInput LevelOutput LevelVCC Typ (V)fMax Typ (MHz)tJitter Typ (ps)tskew(OO) Max (ps)tpd Typ (ns)
NB4N840MMNG2:12CMLCML2.532000.15250.225
NB4N840MMNR4G2:12CMLCML2.532000.15250.225
NB4N840MMNTWG2:12CMLCML2.532000.15250.225
2 x 2 Crosspoint Switch, Dual, 3.3 V, 3.2 Gb / s, with CML Outputs (102kB) NB4N840M
AC Characteristics of ECL Devices NB100LVEP91
Board Mounting Notes for Quad Flat-Pack No-Lead Package (QFN) NB100LVEP91
Clock Generation and Clock and Data Marking and Ordering Information Guide NB100LVEP91
ECL Clock Distribution Techniques NB100LVEP91
ECLinPS Plus™ Spice Modeling Kit MC10EPT20
Interfacing with ECLinPS NB100LVEP91
Termination and Interface of ON Semiconductor ECL Logic Devices with CML (Current Mode Logic) Output Structure NB6L295M
Termination of ECL Logic Devices NB100LVEP91
Thermal Analysis and Reliability of WIRE BONDED ECL NB100LVEP91
ECLinPS Plus SPICE Modeling Kit NB4N840M
IBIS Model for nb4n840m NB4N840M
NB4N840MMNEVB GERBER NB4N840MMNEVB
EVBUM2078/D - 362 NB4N840MMNEVB
QFN32, 5x5, 0.5P, 3.1x3.1EP NCN6804