NB6L56: Clock / Data Multiplexer, 2.5 V / 3.3 V Dual 2:1 Differential, with LVPECL Outputs

The NB6L56 is a high performance Dual 2-to-1 Differential Clock or Data multiplexer. The Multi-Level differential inputs incorporate internal 50 Ohms termination resistors that are accessed through the VT pin. This feature allows the NB6L56 to accept various Differential logic level standards, such as LVPECL, CML or LVDS. Outputs are 800 mV LVPECL signals.

Features
  • Maximum Input Data Rate > 2.5 Gbps
  • Maximum Input Clock Frequency > 2.5 GHz
  • Jitter is < 1 ps RMS RJ (Data); < 10 ps PP DJ (Data); and < 0.7 ps RMS Crosstalk induced jitter (CLOCK)
  • 360 ps Max Propagation Delay
  • 180 ps Max Rise and Fall Times
  • Operating Range is VCC = 2.5 5% (2.375 V to 2.625 V with VEE = 0 V), orVCC =3.3 10% (3.0 V to 3.6 V with VEE = 0 V)
  • Internal 50 Input Termination Resistors
  • Industrial Temp. Range (40C to 85C)
  • QFN32 Package
Applications
  • Data Communications System
  • SONET OC-3 to OC-48
  • Fibre Channel
  • GigE
End Products
  • LAN/WAN
  • ATE
  • Test and Measurement
  • Enterprise Servers
Application Notes (7)
Document TitleDocument ID/SizeRevisionRevision Date
AC Characteristics of ECL DevicesAND8090/D (896.0kB)1
Board Level Application Notes for DFN and QFN PackagesAND8211/D (175.0kB)1
Board Mounting Notes for Quad Flat-Pack No-Lead Package (QFN)AND8086/D (40.0kB)0
Clock Generation and Clock and Data Marking and Ordering Information GuideAND8002/D (71kB)12
Semiconductor Package Thermal CharacterizationAND8215/D (363.0kB)0
Storage and Handling of Drypack Surface Mount DeviceAND8003/D (49kB)2Mar, 2016
Thermal Analysis and Reliability of WIRE BONDED ECLAND8072/D (119.0kB)5
Package Drawings (1)
Document TitleDocument ID/SizeRevision
QFN32, 5x5, 0.5P, 3.1x3.1EP488AM (57.4kB)A
Data Sheets (1)
Document TitleDocument ID/SizeRevisionRevision Date
Clock / Data Multiplexer, 2.5 V / 3.3 V Dual 2:1 Differential, with LVPECL OutputsNB6L56/D (133.0kB)0
Order Information
ProductStatusCompliancePackageMSL*ContainerBudgetary Price/Unit
NB6L56MNGActivePb-free Halide freeQFN-32488AM1Tube74Contact BDTIC
NB6L56MNTXGActivePb-free Halide freeQFN-32488AM1Tape and Reel1000Contact BDTIC
Specifications
ProductInput/Output RatioChannelsInput LevelOutput LevelVCC Typ (V)fMax Typ (MHz)tJitter Typ (ps)tskew(OO) Max (ps)tpd Typ (ns)
NB6L56MNG2:12ECL CML LVDSECL3.3 2.525000.5120.25
NB6L56MNTXG2:12LVDS ECL CMLECL3.3 2.525000.5120.25
Clock / Data Multiplexer, 2.5 V / 3.3 V Dual 2:1 Differential, with LVPECL Outputs (133.0kB) NB6L56
AC Characteristics of ECL Devices NB100LVEP91
Board Level Application Notes for DFN and QFN Packages NB6L56
Board Mounting Notes for Quad Flat-Pack No-Lead Package (QFN) NB100LVEP91
Clock Generation and Clock and Data Marking and Ordering Information Guide NB100LVEP91
Semiconductor Package Thermal Characterization NGTB15N60EG
Storage and Handling of Drypack Surface Mount Device NB3U23C
Thermal Analysis and Reliability of WIRE BONDED ECL NB100LVEP91
QFN32, 5x5, 0.5P, 3.1x3.1EP NCN6804