NB6N239S: 3.3 V Any Differential Clock to LVDS, ÷·1/2/4/8 and ÷·2/4/8/16 Clock Divider
The NB6N239S is a high-speed, low skew clock divider with two divider circuits, each having selectable clock divide ratios; Div1/2/4/8 and Div 2/4/8/16. Both divider circuits drive LVDS compatible outputs. The NB6N239S is a member of the ECLinPS MAXTM family of high performance clock products.
Features- Maximum Clock Input Frequency, 3.0 GHz (1.5 GHz with Div 1)
- Input Compatible with LVDS/LVPECL/CML/HSTL
- 120ps Typical Rise/Fall Times
- < 5 ps Typical Within Device Output Skew
- Example; 622.08 MHz Input Generates 38.88 MHz to 622.08 MHz outputs
- Internal 50Ω Termination Provided
- < 2ps RMS Random Clock Jitter
- Divide-by-1 Edge of QA Aligned to QB Divided Output
- Operating Range: VCC = 3.0 V to 3.465V with GND = 0
- Master Reset for Synchronization of Multiple Chips
- VBBAC Reference Output
- Synchronous Output Disable/Enable
- Pb-Free Packages are Available
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Applications- SONET/SDH Equipment Clocking
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Application Notes (15)
Package Drawings (1)
Simulation Models (1)
Evaluation Board Documents (2)
Data Sheets (1)
Evaluation/Development Tool Information
| Product | Status | Compliance | Short Description |
|---|
| NB6N239SMNEVB | Active | | Differential Clock Evaluation Board |
Order Information
| Product | Status | Compliance | Package | MSL* | Container | Budgetary Price/Unit |
|---|
| NB6N239SMNG | Active | Pb-free
Halide free | QFN-16 | 485G-01 | 1 | Tube | 123 | Contact BDTIC |
| NB6N239SMNR2G | Active | Pb-free
Halide free | QFN-16 | 485G-01 | 1 | Tape and Reel | 3000 | Contact BDTIC |
Specifications
| Product | Type | Input Level | Output Level | VCC Typ (V) | fMax Typ (MHz) | tpd Typ (ns) | tR & tF Max (ps) |
|---|
| NB6N239SMNG | Divider | CML
CMOS
LVDS
ECL | LVDS | 3.3 | 3000 | 0.665 | 190 |
| NB6N239SMNR2G | Divider | CMOS
ECL
LVDS
CML | LVDS | 3.3 | 3000 | 0.665 | 190 |
