NB7L1008M: Clock / Data Fanout Buffer, 1:8 Differential, with CML Outputs
The NB7L1008M is a high performance differential 1:8 Clock/Data fanout buffer. The NB7L1008M produces eight identical output copies of Clock or Data operating up to 6 GHz or 10.7 Gb/s, respectively. As such, the NB7L1008M is ideal for SONET, GigE, Fiber Channel, Backplane and other Clock/Data distribution applications. The differential inputs incorporate internal 50-ohm termination resistors that are accessed through the VT pin. This feature allows the NB7L1008M to accept various logic standards, such as LVPECL, CML, LVDS, LVCMOS or LVTTL logic levels. The VREFAC reference output can be used to rebias capacitor-coupled differential or single-ended input signals. The 1:8 fanout design was optimized for low output skew applications. The NB7L1008M is a member of the GigaComm family of high performance clock products.
Features- Input Data Rate > 12 Gb/s Typical
- Data Dependent Jitter < 20 ps
- Maximum Input Clock Frequency > 8 GHz Typical
- Random Clock Jitter < 0.8 ps RMS
- Low Skew 1:8 CML Outputs, < 25 ps max
- Multi-Level Inputs, accepts LVPECL, CML, LVDS
- Differential CML Outputs, 400 mV Peak-to-Peak, Typical
- Operating Range: VCC = 2.375 V to 3.6 V, GND = 0 V
- Internal Input Termination Resistors, 50-ohm
- VREFAC Reference Output
- -40C to +85C Ambient Operating TemperaturerPas
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Applications- Clock distribution for SONET, Gigabit Ethernet and Fibre Channel
- Network routers and multiprocessor synchronous Clock distribution
| End Products |
Data Sheets (1)
Package Drawings (1)
Order Information
Product | Status | Compliance | Package | MSL* | Container | Budgetary Price/Unit |
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NB7L1008MMNG | Active | Pb-free
Halide free | QFN-32 | 488AM | 1 | Tube | 74 | Contact BDTIC |
NB7L1008MMNR4G | Active | Pb-free
Halide free | QFN-32 | 488AM | 1 | Tape and Reel | 1000 | Contact BDTIC |
NB7L1008MMNTWG | Active | Pb-free
Halide free | QFN-32 | 488AM | 1 | Tape and Reel | 1000 | Contact BDTIC |
Specifications
Product | Type | Channels | Input / Output Ratio | Input Level | Output Level | VCC Typ (V) | tJitterRMS Typ (ps) | tskew(o-o) Max (ps) | tpd Typ (ns) | tR & tF Max (ps) | fmaxClock Typ (MHz) | fmaxData Typ (Mbps) |
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NB7L1008MMNG | Buffer | 1 | 1:8 | ECL
CML
LVDS | CML | 3.3
2.5 | 0.2 | 25 | 0.16 | 70 | 8000 | 12000 |
NB7L1008MMNR4G | Buffer | 1 | 1:8 | ECL
LVDS
CML | CML | 3.3
2.5 | 0.2 | 25 | 0.16 | 70 | 8000 | 12000 |
NB7L1008MMNTWG | Buffer | 1 | 1:8 | LVDS
CML
ECL | CML | 2.5
3.3 | 0.2 | 25 | 0.16 | 70 | 8000 | 12000 |