NB7L14: Clock / Data Fanout Buffer, 7 GHz, 1:4 Differential, LVPECL, 2.5 V, 3.3 V

The NB7L14 is a differential 1:4 LVPECL fanout buffer. The NB7L14 produces four identical LVPECL output copies of Clock or Data operating up to 7 GHz or 10.7 Gb/s, respectively. As such, the NB7L14 is ideal for SONET, GigE, Fiber Channel, Backplane and other Clock or Data distribution applications. The differential inputs incorporate internal 50-ohm termination resistors that are accessed through the VT Pin. This feature allows the NB7L14 to accept various logic standards, such as LVPECL, CML, LVDS, LVCMOS or LVTTL logic levels. The VREFAC reference output can be used to rebias capacitor-coupled differential or single-ended input signals. The 1:4 fanout design was optimized for low output skew applications.

Features
  • Maximum Input Clock Frequnecy up to 7 GHz Typical
  • Maximum Input Data Rate up to 10 Gb/s Typical
  • < 0.8 ps of RMS Clock Jitter
  • < 15 ps of Data Dependent Jitter
  • 45 ps Typical Rise and Fall Times
  • 165 ps Typical Propogation Delay
  • 3 ps Typical Within Device Skew
  • Operating Range: VCC = 2.375 V to 3.6 V
  • LVPECL Output Level, 720 mV Peak-to-Peak
  • 50-ohm Internal Input Termination Resistors
  • Functionally Compatible with Existing 2.5 V / 3.3 V LVEL, LVEP, EP, and SG devices
Applications
  • OC-48 and OC-192 SONET/SDH Data Buffering applications
  • ATE High Speed Communcations Links
Application Notes (2)
Document TitleDocument ID/SizeRevisionRevision Date
Clock Generation and Clock and Data Marking and Ordering Information GuideAND8002/D (71kB)12
Termination of ECL Logic DevicesAND8020/D (176.0kB)6
Package Drawings (2)
Document TitleDocument ID/SizeRevision
QFN16 3x3, 0.5P485AE (32.1kB)C
QFN16, 3x3, 0.5P485G-01 (57.3kB)F
Simulation Models (1)
Document TitleDocument ID/SizeRevisionRevision Date
NB7L14 IBIS ModelNB7L14.ibs (41kB)1.0Mar, 2013
Evaluation Board Documents (1)
Document TitleDocument ID/SizeRevisionRevision Date
NB7L14MNGEVB ManualEVBUM2184/D (621.0kB)0
Data Sheets (1)
Document TitleDocument ID/SizeRevisionRevision Date
2.5V/3.3V 7GHz/10Gbps Differential 1:4 LVPECL Fanout BufferNB7L14/D (142kB)6Jul, 2015
Evaluation/Development Tool Information
ProductStatusComplianceShort Description
NB7L14MNGEVBActivePb-freeDifferential Fanout Buffer Evaluation Board
Order Information
ProductStatusCompliancePackageMSL*ContainerBudgetary Price/Unit
NB7L14MN1GActivePb-free Halide freeQFN-16485AE1Tube123Contact BDTIC
NB7L14MN1TWGActivePb-free Halide freeQFN-16485AE1Tape and Reel3000Contact BDTIC
NB7L14MN1TXGActivePb-free Halide freeQFN-16485AE1Tape and Reel3000Contact BDTIC
NB7L14MNGActivePb-free Halide freeQFN-16485G-011Tube123Contact BDTIC
NB7L14MNHTBGActivePb-free Halide freeQFN-16485G-011Tape and Reel100Contact BDTIC
NB7L14MNTXGActivePb-free Halide freeQFN-16485G-011Tape and Reel3000Contact BDTIC
Specifications
ProductTypeChannelsInput / Output RatioInput LevelOutput LevelVCC Typ (V)tJitterRMS Typ (ps)tskew(o-o) Max (ps)tpd Typ (ns)tR & tF Max (ps)fmaxClock Typ (MHz)fmaxData Typ (Mbps)
NB7L14MN1GBuffer11:4LVDS LVTTL CML LVCMOS LVPECLLVPECL2.5 3.30.5150.16560800011000
NB7L14MN1TWGBuffer11:4LVDS LVTTL LVCMOS LVPECL CMLLVPECL2.5 3.30.5150.16560800011000
NB7L14MN1TXGBuffer11:4LVTTL LVCMOS CML LVDS LVPECLLVPECL3.3 2.50.5150.16560800011000
NB7L14MNGBuffer11:4LVTTL CML LVCMOS LVPECL LVDSLVPECL3.3 2.50.5150.16560800011000
NB7L14MNHTBGBuffer11:4LVCMOS CML LVPECL LVDS LVTTLLVPECL2.5 3.30.5150.16560800011000
NB7L14MNTXGBuffer11:4LVTTL LVDS LVPECL CML LVCMOSLVPECL2.5 3.30.5150.16560800011000
2.5V/3.3V 7GHz/10Gbps Differential 1:4 LVPECL Fanout Buffer (142kB) NB7L14
Clock Generation and Clock and Data Marking and Ordering Information Guide NB100LVEP91
Termination of ECL Logic Devices NB100LVEP91
NB7L14 IBIS Model NB7L14
EVBUM2184/D - 621 NB7L14MNGEVB
QFN16 3x3, 0.5P NLAS4783B
QFN16, 3x3, 0.5P NLSF308