NBSG86A: SiGe Differential Smart Gate, 2.5 V / 3.3 V, with Output Level Select

The NBSG86A is a multi-function differential Logic Gate which can be configured as an AND/NAND, OR/NOR, XOR/XNOR, or 2:1 MUX. This device is part of the GigaComm family of high performance Silicon Germanium products. The device is housed in a low profile 4x4 mm, 16-pin, flip-chip BGA or a 3x3 mm 16 pin QFN package.Differential inputs incorporate internal 50-ohm termination resistors and accept NECL (Negative ECL), PECL (Positive ECL), LVCMOS/LVTTL, CML, or LVDS. The OLS input is used to program the peak-to-peak output amplitude between 0 and 800 mV in five discrete steps.The NBSG86A employs input clamping circuitry so that under open input conditions (Dx, Dbarx, VTDx, VTDbarx, VTSEL) the outputs of the device will remain stable.

Features
  • Maximum Input Clock Frequency > 8 GHz Typical
  • Maximum Data Input Rate > 8 Gb/s Typical
  • 165 ps Typical Propagation Delay
  • 40 ps Typical Rise and Fall Times
  • Selectable Swing PECL Output with Operating Range: VCC = 2.375 V to 3.465 V with VEE = 0 V
  • Selectable Swing NECL Output with NECL Inputs with Operating Range: VCC = 0 V with VEE = -2.375 V to -3.465 V
  • 50Ω Internal Input Termination Resistors
  • Selectable Output Level Select (0 V, 200 mV, 400 mV, 600 mV, or 800 mV Peak-to-Peak Output)
End Products
  • ATE Instrumentation, Networking
Application Notes (13)
Document TitleDocument ID/SizeRevisionRevision Date
AC Characteristics of ECL DevicesAND8090/D (896.0kB)1
Board Mounting Considerations for FCBGA PackagesAND8075/D (56.0kB)0
Board Mounting Notes for Quad Flat-Pack No-Lead Package (QFN)AND8086/D (40.0kB)0
Chips that RipAND8068/D (25.0kB)0
Clock Generation and Clock and Data Marking and Ordering Information GuideAND8002/D (71kB)12
Designing with PECL (ECL at +5.0 V)AN1406/D (105.0kB)2
ECL Clock Distribution TechniquesAN1405/D (54.0kB)1
GigaComm (SiGe) SPICE Modeling KitAND8077/D (157kB)6
Interfacing with ECLinPSAND8066/D (72kB)3
Odd Number Divide By Counters with 50% Outputs and Synchronous ClocksAND8001/D (90.0kB)0
Storage and Handling of Drypack Surface Mount DeviceAND8003/D (49kB)2Mar, 2016
Termination of ECL Logic DevicesAND8020/D (176.0kB)6
Thermal Analysis and Reliability of WIRE BONDED ECLAND8072/D (119.0kB)5
Data Sheets (1)
Document TitleDocument ID/SizeRevisionRevision Date
2.5V/3.3V SiGe Differential Smart Gate with Output SelectNBSG86A/D (131kB)19Jun, 2014
Simulation Models (3)
Document TitleDocument ID/SizeRevisionRevision Date
IBIS Model for NBSG86AMN 3.3V 800 mV swingNBSG86AMN_33_800.IBS (18.0kB)2
IBS Model for NBSG86ABA (3.3 V, 400 mV)NBSG86ABA_33V_400MV.IBS - 16.0 (15.0kB)2
IBS Model for NBSG86ABA (3.3V, 400 mV)NBSG86ABA_33V_800MV.IBS - 16.0 (17.0kB)2
Package Drawings (1)
Document TitleDocument ID/SizeRevision
QFN16, 3x3, 0.5P485G-01 (57.3kB)F
Order Information
ProductStatusCompliancePackageMSL*ContainerBudgetary Price/Unit
NBSG86AMNGActivePb-free Halide freeQFN-16485G-011Tube123Contact BDTIC
NBSG86AMNHTBGActivePb-free Halide freeQFN-16485G-011Tape and Reel100Contact BDTIC
NBSG86AMNR2GActivePb-free Halide freeQFN-16485G-011Tape and Reel3000Contact BDTIC
Specifications
ProductTypeChannelsInput LevelOutput LevelVCC Typ (V)fToggle Max (MHz)tpd Typ (ns)tJitter Typ (ps)tR & tF Max (ps)
NBSG86AMNGSmartGate1TTL CMOS LVDS CML ECLRSECL3.3 2.580000.1650.565
NBSG86AMNHTBGSmartGate1TTL CMOS LVDS ECL CMLRSECL3.3 2.580000.1650.565
NBSG86AMNR2GSmartGate1LVDS CML TTL CMOS ECLRSECL2.5 3.380000.1650.565
2.5V/3.3V SiGe Differential Smart Gate with Output Select (131kB) NBSG86A
AC Characteristics of ECL Devices NB100LVEP91
Board Mounting Considerations for FCBGA Packages NBSG86A
Board Mounting Notes for Quad Flat-Pack No-Lead Package (QFN) NB100LVEP91
Chips that Rip NBSG86A
Clock Generation and Clock and Data Marking and Ordering Information Guide NB100LVEP91
Designing with PECL (ECL at +5.0 V) NB100LVEP91
ECL Clock Distribution Techniques NB100LVEP91
GigaComm (SiGe) SPICE Modeling Kit NBSG86A
Interfacing with ECLinPS NB100LVEP91
Odd Number Divide By Counters with 50% Outputs and Synchronous Clocks NUP4201
Storage and Handling of Drypack Surface Mount Device NB3U23C
Termination of ECL Logic Devices NB100LVEP91
Thermal Analysis and Reliability of WIRE BONDED ECL NB100LVEP91
IBIS Model for NBSG86AMN 3.3V 800 mV swing NBSG86A
IBS Model for NBSG86ABA (3.3 V, 400 mV) NBSG86A
IBS Model for NBSG86ABA (3.3V, 400 mV) NBSG86A
QFN16, 3x3, 0.5P NLSF308