| Part Name | Order | Program Memory (KB) | RAM (KB) | Operating Voltage Min (V) |
|---|---|---|---|---|
| HD6417750SVF133 | contact | 0.0 | 0.0 | 3.0 |
| HD6417750SVBT133 | contact | 0.0 | 0.0 | 3.0 |
| HD6417750SF200W | contact | 0.0 | 0.0 | 3.0 |
| HD6417750SF200 | contact | 0.0 | 0.0 | 3.0 |
| HD6417750SF167I | contact | 0.0 | 0.0 | 3.0 |
| HD6417750SF167D | contact | 0.0 | 0.0 | 3.0 |
| HD6417750SF167 | contact | 0.0 | 0.0 | 3.0 |
| HD6417750SBP200W | contact | 0.0 | 0.0 | 3.0 |
| HD6417750SBP200 | contact | 0.0 | 0.0 | 3.0 |
| HD6417750SBA200 | contact | 0.0 | 0.0 | 3.0 |
The SH7750S is a 32-bit RISC (reduced instruction set computer) microprocessor, featuring object code upward-compatibility with SH-1, SH-2, and SH-3 microcomputers. It includes an instruction cache, an operand cache with a choice of copy-back or write-through mode, and an MMU (memory management unit) with a 64-entry fully-associative unified TLB (translation look aside buffer). The SH7750S has an 8-kbyte instruction cache and a 16-kbyte data cache.
The SH7750S has an on-chip bus state controller (BSC) that allows connection to DRAM and synchronous DRAM. Its 16-bit fixed-length instruction set enables program code size to be reduced by almost 50% compared with 32-bit instructions.
