DataSheetFeature| Description | The TMPV76 Series are image recognition processors that process input video images in real-time. They detect target objects such as persons, faces, hands, vehicles, traffic lanes, and so on. The series can be used for camera vision systems utilizing various image-recognition technologies such as Advanced Driver Assistance System (ADAS), Intelligent Transport System (ITS), surveillance camera, gaming device, and energy control system for air conditioning and lighting, etc. |
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| RoHS Compatible Product(s) (#) | Available |
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Package Information| Package Image |  |
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| Toshiba Package Name | P-LFBGA521-1717-0.65-001 |
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| Pins | 521 |
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| Mounting | Surface Mount |
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| Description| Property | Value | Unit |
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| CPU (MeP) | 2 | - | | clock frequency (MeP) | 266.7 | MHz | | image processing processor (MPE) | 4 | - | | clock frequency (MPE) | 266.7 | MHz | | image processing processor (L2 cache) | 256 | Kbyte | | image processing accelerator affine transform | 2 | ch | | image processing accelerator filter | 2 | ch | | image processing accelerator histogram | 2 | ch | | image processing accelerator histogram of oriented gradients(HOG) | 2 | ch | | image processing accelerator matching | 2 | ch | | image processing accelerator Enhanced CoHOG | 1 | ch | | image processing accelerator Pyramid | 2 | ch | | ROM type | Mask ROM | - | | ROM size | 80 | Kbyte | | RAM size | 1632 | Kbyte | | video input interface | 1 | ch | | camera input port | 2 | ch | | video output interface | 1 | ch | | Memory controller | LPDDR2-SDRAM / SRAM / NOR Flash | - | | DMA controllers | 5 | ch | | external MCU I/F (8bit parallel bus) | 1 | ch | | CAN interface | 2 | ch | | CAN FD interface | 2 | ch | | I2C | 4 | ch | | UART | 5 | ch | | SPI | 4 | ch | | PCM | 2 | ch | | timer/counter | 20 | ch |
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