数据手册MAX5270, MAX5270A, MAX5270B .pdf [英文Rev.1(PDF,264kB)]

{状况:生产中。}

The MAX5270 contains eight 13-bit, voltage-output digital-to-analog converters (DACs). On-chip precision output amplifiers provide the voltage outputs. The device operates from +12V/-12V supplies. Its output voltage swing ranges from 0V to +8.192V and is achieved with no external components. The MAX5270 has three pairs of differential reference inputs; two of these pairs are connected to two DACs each, and a third pair is connected to four DACs. The references are independently controlled, providing different full-scale output voltages to the respective DACs. The MAX5270 operates within the following voltage ranges: VDD = +11.4V to +12.6V, VSS = -11.4V to -12.6V, and VCC = +4.75V to +5.25V. The MAX5270 features double-buffered interface logic with a 13-bit parallel data bus. Each DAC has an input latch and a DAC latch. Data in the DAC latch sets the output voltage. The eight input latches are addressed with three address lines. Data is loaded to the input latch with a single write instruction. An asynchronous load input (active-low LD) transfers data from the input latch to the DAC latch. The active-low LD input controls all DACs; therefore, all DACs can be updated simultaneously by asserting the LD-bar pin. An asynchronous active-low CLR input sets the output of all eight DACs to the respective DUTGND input of the op amp. Note that active-low CLR is a CMOS input, which is powered by VDD. All other logic inputs are TTL/CMOS compatible. The "A" grade of the MAX5270 has a maximum INL of ±2LSBs, while the "B" grade has a maximum INL of ±4LSBs. Both grades are available in 44-pin MQFP packages.

产品关键特性
  • Full 13-Bit Performance Without Adjustments
  • 8 DACs in a Single Package
  • Buffered Voltage Outputs
  • Voltage Swing Between 0V and 8.192V
  • 22µs Output Settling Time
  • Drives up to 10,000pF Capacitive Load
  • Low Output Glitch: 30mV
  • Low Power Consumption: 10mA (typ)
  • Small Package: 44-Pin MQFP
  • Double-Buffered Digital Inputs
  • Asynchronous Load Updates All DACs Simultaneously
  • Asynchronous CLR-bar Forces All DACs to DUTGND Potential
应用与使用范围
  • 任意函数发生器
  • 自动测试设备(ATE)
  • 航空电子与军用系统
  • 数字增益与失调控制
  • 工业过程控制
  • 元件数最少的模拟系统
  • SONET应用
功能原理框图

芯片订购型号
订购型号产品状态封装形式工作温度RoHS/无铅
MAX5270ACMH生产中MQFP;44引脚;181.2mm²封装信息0°C至+70°C参考数据资料
MAX5270ACMH-T生产中MQFP;44引脚封装信息0°C至+70°C参考数据资料
MAX5270AEMH生产中MQFP;44引脚;181.2mm²封装信息-40°C至+85°C参考数据资料
MAX5270AEMH-T生产中MQFP;44引脚封装信息-40°C至+85°C参考数据资料
MAX5270BCMH生产中MQFP;44引脚封装信息0°C至+70°C参考数据资料
MAX5270BCMH-T生产中MQFP;封装信息0°C至+70°C参考数据资料
MAX5270BEMH生产中MQFP;44引脚封装信息-40°C至+85°C参考数据资料
MAX5270BEMH-T生产中MQFP;封装信息-40°C至+85°C参考数据资料
MAX5270, MAX5270A, MAX5270B : 八通道、13位、电压输出DAC,并行接口 MAX5270
MAX5270, MAX5270A, MAX5270B : 八通道、13位、电压输出DAC,并行接口 MAX5270A
MAX5270, MAX5270A, MAX5270B : 八通道、13位、电压输出DAC,并行接口 MAX5270B