LPC4310FET100: 双核Cortex-M4/M0、168 KB SRAM、CAN、AES、SPIFI、SGPIO、SCT

LPC4310FET100是基于ARM Cortex-M4的数字信号控制器,具有一个ARM Cortex-M0协处理器,设计用于需要信号处理的嵌入式应用。ARM Cortex-M4内核提供单周期乘法累加指令和SIMD指令,以及1个硬件浮点单元来支持信号处理,同时由M0协处理器进行I/O和数字控制的处理。LPC4310FET100包含168 KB的数据存储,先进的可配置外设如状态可配置的定时器(SCT),串行通用I/O (SGPIO),SPI闪存接口(SPIFI),以及一个外部存储控制器和多个数字和模拟外设。

sot926-1_3d
数据手册 (2)
名称/描述修改日期
32-bit ARM Cortex-M4/M0 MCU; up to 264 kB SRAM; Ethernet; two High-speed USBs; advanced configurable peripherals (REV 3.1) PDF (3.4 MB) LPC4350_30_20_10_ZH_120 May 2016
32-bit ARM Cortex-M4/M0 flashless MCU; up to 264 kB SRAM; Ethernet; two HS USBs; advanced configurable peripherals (REV 4.6) PDF (3.1 MB) LPC4350_30_20_1014 Mar 2016
勘误表 (1)
名称/描述修改日期
Errata sheet LPC4370, LPC4350, LPC4330, LPC4320, LPC4310 (REV 6.9) PDF (355.0 kB) ES_LPC43X013 Apr 2016
应用说明 (19)
名称/描述修改日期
Inter Processor Communication on LPC43xx (REV 2.0) ZIP (976.0 kB) AN1117728 Aug 2014
Code Read Protection in LPC1800 and LPC4300 (REV 1.0) ZIP (16.2 MB) AN1158114 Aug 2014
SCT camera interface design with LPC1800 and LPC4300 (REV 1.2) ZIP (1.3 MB) AN1136513 Jun 2014
AES encryption and decryption software on LPC microcontrollers (REV 1.1) ZIP (174.0 kB) AN1124117 Mar 2014
SDRAM interface to LPC18xx/43xx EMC (REV 1.0) PDF (351.0 kB) AN1150831 Jan 2014
LPC1800/LPC4300 One-Time Programmable (OTP) configuration (REV 1.0) ZIP (227.0 kB) AN1129223 Aug 2013
Using the SCT in LPCXpresso, Keil, and IAR (REV 1.0) ZIP (4.1 MB) AN1116109 Aug 2013
Using SPIFI on LPC1800 and LPC4300 (REV 1.0) ZIP (7.0 MB) AN1120609 Aug 2013
Using SGPIO to emulate an SPI master interface (REV 1.0) ZIP (190.0 kB) AN1121009 Aug 2013
In-System Programming of LPC18xx/43xx flash (REV 1.0) ZIP (417.0 kB) AN1124809 Aug 2013
SGPIO on the LPC4300 (REV 1.1) ZIP (970.0 kB) AN1127509 Aug 2013
Wrting a flash programming algorithm for unsupported devices (REV 1.0) ZIP (389.0 kB) AN1128509 Aug 2013
LPC4300 camera interface design using SGPIO (REV 1.1) ZIP (1.7 MB) AN1119622 Jul 2013
How to implement the PMBus software stack (REV 1.0) ZIP (1.1 MB) AN1131822 Jul 2013
SGPIO camera module design using LPC4300 (REV 1.0) ZIP (4.0 MB) AN1134322 Jul 2013
Implementing a UART using SGPIO on LPC4300 (REV 1.0) ZIP (1.7 MB) AN1135122 Jul 2013
Bootmode jumper settings for LPC1800 and LPC4300 (REV 1.0) PDF (247.0 kB) AN1123923 Jul 2012
UUencoding for UART ISP (REV 1.0) PDF (139.0 kB) AN1122906 Jul 2012
PCB layout guidelines for NXP® MCUs in BGA packages (REV 2.0) PDF (272.0 kB) AN1077822 Apr 2011
用户指南 (1)
名称/描述修改日期
LPC43xx/LPC43Sxx ARM Cortex-M4/M0 multi-coremicrocontroller (REV 2.1) PDF (12.2 MB) UM1050317 Dec 2015
手册 (4)
名称/描述修改日期
NXP® 204 MHz, 32-bit Cortex-M4 /Cortex-M0 DSC LPC4300 series; First asymmetrical, dual-core digital... (REV 1.0) PDF (797.0 kB) 7501721601 Nov 2012
NXP® 120 MHz, 32-bit Cortex-M4 DSC LPC407x/LPC408x; Cortex-M4 DSC with FPU, Ethernet, USB, optional LCD,... (REV 1.0) PDF (521.0 kB) 7501733601 Nov 2012
First Asymemetrical, dual-core digital signal controller featuring Cortex-M4 & Cortex-M0 (REV 1.0) PDF (230.0 kB) LPC4300_101 Aug 2011
First asymmetrical, dual-core digital signal controller featuring Cortex-M4 & Cortex-M0; NXP® 150 MHz,... (REV 1.0) PDF (812.0 kB) 7501701301 Feb 2011
封装信息 (1)
名称/描述修改日期
plastic thin fine-pitch ball grid array package; 100 balls; body 9 x 9 x 0.7 mm (REV 1.0) PDF (424.0 kB) SOT926-108 Feb 2016
报告或演示文稿 (1)
名称/描述修改日期
Driving LPC1700/LPC1800/LPC4300 with EPSON Crystals (REV 1.1) PDF (209.0 kB) R_1007627 Nov 2015
支持信息 (3)
名称/描述修改日期
ADC design guidelines (REV 1.0) PDF (145.0 kB) TN0000909 May 2014
Connecting a USB power switch to the LPC18xx / LPC43xx (REV 1.0) PDF (76.0 kB) TN0000706 Mar 2013
LPC1800 and LPC4300 MxMEMMAP memory map (REV 1.0) PDF (148.0 kB) TN0000606 Dec 2012
软件
订购信息
型号状态内核Clock speed [max] (MHz)DMIPS闪存 (kB)RAM (kB)EEPROM (kB)安全GPIO以太网USBUSB (speed)USB (type)LCDCANUARTI²CSPII²SADC channelsADC (bits)ComparatorsADC sample rateDAC (bits)定时器Timer (bits)SCTimer / PWMRTCPWMQEIPackage nameTemperature rangeSupply voltage [min] (V)Temperature sensorSupply voltage [max] (V)IOHDemoboardProduct category
LPC4310FET100/3DActiveCortex-M4F & M020401680N4900242324101041321161TFBGA100-40 °C to +85 °C2.43.6OM13040; OM13027; OM13031
LPC4310FET100ActiveCortex-M4F & M020443001680N4900242324100400 ksps1041321161TFBGA100-40 °C to +85 °C2.403.6NOM13040; OM13027; OM13031190-LPC4300-
封装环保信息
产品编号封装说明Outline Version回流/波峰焊接包装产品状态部件编号订购码 (12NC)Marking化学成分RoHS / 无铅 / RHF无铅转换日期MSLMSL LF
LPC4310FET100SOT926-1Tray, Bakeable, Single in DrypackActiveLPC4310FET100,551 (9352 941 69551)Standard MarkingLPC4310FET100Always Pb-freeNA3
LPC4310FET100/3DSOT926-1Tray, Bakeable, Single in DrypackActiveLPC4310FET100/3DE (9353 086 84551)Standard MarkingLPC4310FET100/3DAlways Pb-freeNA3
32-bit ARM Cortex-M4/M0 MCU; up to 264 kB SRAM; Ethernet; two High-speed USBs; advanced configurable peripherals LPC4350FET256
32-bit ARM Cortex-M4/M0 flashless MCU; up to 264 kB SRAM; Ethernet; two HS USBs; advanced configurable peripherals LPC4350FET256
32-bit ARM Cortex-M4/M0 MCU; up to 264 kB SRAM; Ethernet; two High-speed USBs; advanced configurable peripherals LPC4350FET256
32-bit ARM Cortex-M4/M0 flashless MCU; up to 264 kB SRAM; Ethernet; two HS USBs; advanced configurable peripherals cortex_m0_m4f
Errata sheet LPC4370, LPC4350, LPC4330, LPC4320, LPC4310 LPC4370FET256
Inter Processor Communication on LPC43xx LPC4350FET256
Code Read Protection in LPC1800 and LPC4300 LPC43S57JET256
SCT camera interface design with LPC1800 and LPC4300 LPC43S50FET256
AES encryption and decryption software on LPC microcontrollers LPC43S50FET256
SDRAM interface to LPC18xx/43xx EMC LPC43S50FET256
LPC1800/LPC4300 One-Time Programmable (OTP) configuration LPC4357JET256
Using the SCT in LPCXpresso, Keil, and IAR LPC4350FET256
Using SPIFI on LPC1800 and LPC4300 LPC4357FET256
Using SGPIO to emulate an SPI master interface LPC4357FET256
In-System Programming of LPC18xx/43xx flash LPC4357FET256
SGPIO on the LPC4300 LPC4357JET256
Wrting a flash programming algorithm for unsupported devices LPC4357JET256
LPC4300 camera interface design using SGPIO LPC4357JET256
How to implement the PMBus software stack LPC43S50FET256
SGPIO camera module design using LPC4300 LPC43S50FET256
Implementing a UART using SGPIO on LPC4300 LPC43S50FET256
Bootmode jumper settings for LPC1800 and LPC4300 LPC4350FET256
UUencoding for UART ISP LPC43S50FET256
PCB layout guidelines for NXP® MCUs in BGA packages LPC4350FET256
LPC43xx/LPC43Sxx ARM Cortex-M4/M0 multi-coremicrocontroller LPC43S70FET256
NXP® 204 MHz, 32-bit Cortex-M4 /Cortex-M0 DSC LPC4300 series; First asymmetrical, dual-core digital... LPC4310FET100
NXP® 120 MHz, 32-bit Cortex-M4 DSC LPC407x/LPC408x; Cortex-M4 DSC with FPU, Ethernet, USB, optional LCD,... LPC4310FET100
First Asymemetrical, dual-core digital signal controller featuring Cortex-M4 & Cortex-M0 LPC4310FET100
First asymmetrical, dual-core digital signal controller featuring Cortex-M4 & Cortex-M0; NXP® 150 MHz,... LPC4350FET256
Driving LPC1700/LPC1800/LPC4300 with EPSON Crystals LPC43S70FET256
ADC design guidelines LPC4333JET256
Connecting a USB power switch to the LPC18xx / LPC43xx LPC43S50FET256
LPC1800 and LPC4300 MxMEMMAP memory map LPC4357JET256
AN11161 - Using the SCT in LPCXpresso, Keil, and IAR LPC4350FET256
SOT926-1 LPC43S70FET100
LPC2368FET100