TDA19978BHV Quad HDMI 1.4a receiver with digital processing
The TDA19978B is a four input HDMI 1.4a compliant receiver with embedded EDID memory. The built-in auto-adaptive equalizer improves signal quality and allows the use of cable lengths up to 25 m which are laboratory tested with a 0.5 mm (24 AWG) cable at 2.05 gigasamples per second. In addition, the TDA19978B is delivered with software drivers to ease configuration and use.
The TDA19978B supports:
- TV resolutions:
- 480i (1440 × 480i at 60 Hz), 576i (1440 × 576i at 50 Hz) to HDTV (up to 1920 × 1080p at 50/60 Hz)
- WUXGA (1920 × 1200p at 60 Hz) reduced blanking format
- PC resolutions:
- VGA (640 × 480p at 60 Hz) to UXGA (1600 × 1200p at 60 Hz)
- Deep Color mode in 10-bit and 12-bit (up to 205 MHz TMDS clock)
- Gamut boundary description
- IEC 60958/IEC 61937, OBA (One Bit Audio), DST (Direct Stream Transfer) and HBR (High Bit Rate) stream
The TDA19978B includes:
- An enhanced PC and TV format recognition system
- Generation of a 128/256/512 × fs system clock allowing the use of simple audio DACs without an integrated PLL (such as the UDA1334BTS)
- An embedded oscillator (an external crystal can also be used)
- Improved audio clock generation using an external reference clock
- OBA (as used in SACD), DST and HBR stream support
The TDA19978B converts HDMI streams without HDCP into RGB or YCbCr digital signals. The YCbCr digital output signal can be 4:4:4 or 4:2:2 semi-planar format based on the ITU-R BT.601 standard or 4:2:2 based on the ITU-R BT.656 format. The device can adjust the output timing of the video port by altering the values of tsu(Q) and th(Q). In addition, all settings are controllable using the I²C-bus
产品特点 Features
- Complies with the HDMI 1.4a, DVI 1.0 and CEA-861-D
- Four (quad) independent HDMI inputs, up to the HDMI frequency of 205 MHz
- Embedded auto-adaptive equalizer on all HDMI links
- EDID memory: 253 shared bytes and three bytes dedicated to each HDMI input
- Supports color depth processing (8-bit, 10-bit or 12-bit per color)
- Color gamut metadata packet with interrupt on each update, readable via the I²C-bus
- Up to four S/PDIF or I²S-bus outputs (eight channels) at a sampling rate up to 192 kHz with IEC 60958/IEC 61937 stream
- HBR audio stream up to 768 kHz with four demultiplexed S/PDIF or I²S-bus outputs
- HBR streams (compatible with DTS-HD master audio and Dolby TrueHD up to eight channels due to HBR packet for stream with a frame rate up to 768 kHz) support
- DSD and DST audio stream up to six DSD channels output for SACD with DST audio packet support
- Channel status decoder supports multi-channel reception
- Improved audio clock generation using an external reference clock
- System/master clock output (128/256/512 × fs) enables the use of the UDA1334BTS
- The HDMI interface supports:
- All HDTV formats up to 1920 × 1080p at 50/60 Hz and WUXGA (1920 × 1200p at 60 Hz) with support for reduced blanking
- 3D formats including all primary formats up to 1920 × 1080p at 30 Hz Frame Packing and 1920 × 1080p at 60 Hz Top-and-Bottom
- PC formats up to UXGA (1600 × 1200p at 60 Hz)
- Embedded oscillator (an external crystal can be used)
- Frame and field detection for interlaced video signal
- Sync timing measurements for format recognition
- Improved system for measurements of blanking and video active area allowing an accurate recognition of PC and TV formats
- Repeater capability
- Programmable color space input signal conversion from RGB-to-YCbCr or YCbCr-to-RGB
- Output formats: RGB 4:4:4, YCbCr 4:4:4, YCbCr 4:2:2 semi-planar based on the ITU-R BT.601 standard and YCbCr 4:2:2 ITU-R BT.656
- 8-bit, 10-bit or 12-bit output formats selectable using the I²C-bus (8-bit and 10-bit only in 4:4:4 format)
- I²C-bus adjustable timing of video port (tsu(Q) and th(Q))
- Downsampling-by-two with selectable filters on Cb and Cr channels in 4:2:2 mode
- Internal video and audio pattern generator
- Controllable using the I²C-bus; 5 V tolerant and bit rate up to 400 kbit/s
- DDC-bus inputs 5 V tolerant and bit rate up to 400 kbit/s
- LV-TTL outputs
- Power-down mode
- CMOS process
- 1.8 V and 3.3 V power supplies
- Lead-free (Pb) HLQFP144 package
|
应用
- HDTV
- High-end TV
- YCbCr or RGB HI-Speed video digitizer
- Home theater amplifier
- Projector, plasma and LCD TV
- DVD recorder
- Rear projection TV
- AVR and HDMI splitter
产品实物图
|
封装
型号 |
可订购的器件编号 |
订购码 (12NC) |
产品状态 |
封装 |
TDA19978BHV/15/C1 |
9352 873 43518 |
TDA19978BHV/15/C1: |
量产 |
HLQFP144
(SOT612-3) |
TDA19978BHV/15/C1 |
9352 873 43551 |
TDA19978BHV/15/C1 |
量产 |
HLQFP144
(SOT612-3) |
TDA19978BHV/15/C1 |
9352 873 43557 |
TDA19978BHV/15/C1, |
量产 |
HLQFP144
(SOT612-3) |
订货和供应
型号 |
订购码 (12NC) |
可订购的器件编号 |
化学成分 |
TDA19978BHV/15/C1 |
9352 873 43518 |
TDA19978BHV/15/C1: |
TDA19978BHV/15/C1 |
TDA19978BHV/15/C1 |
9352 873 43551 |
TDA19978BHV/15/C1 |
TDA19978BHV/15/C1 |
TDA19978BHV/15/C1 |
9352 873 43557 |
TDA19978BHV/15/C1, |
TDA19978BHV/15/C1 |
TDA19978BHV 技术支持
档案名称 |
标题 |
类型 |
格式 |
AN10441 |
Level shifting techniques in I2C-bus design
|
Application note |
pdf |
AN10216 |
I2C manual
|
Application note |
pdf |
AN10145 |
AN10145 Bi-directional low voltage translators
|
Application note |
pdf |
75017424 |
NXP I2C-bus solutions 2013: Smart, simple solutions for the 12 most common design concerns
|
Leaflet |
pdf |
UM10204 |
I2C-bus specification and user manual
|
User manual |
pdf |
UM10206 |
I2C Demonstration Board 2005-1 Quick Start Guide
|
User manual |
pdf |