频率发生器设计用于低相位噪声本振(LO)电路。
特性和优势
应用
| 产品图片 |
Symbol | Parameter | Conditions | Min | Typ/Nom | Max | Unit |
---|---|---|---|---|---|---|
fi(RF) | RF input frequency | 30 | 513 | MHz | ||
Pi(ref) | reference input power | -10 | 0 | dBm | ||
VCC | supply voltage | 3 | 3.3 | 3.6 | V | |
ICC | supply current | 100 | 130 | mA | ||
fo(RF) | RF output frequency | 7.8 | 8.2 | GHz | ||
φnλ(synth) | synthesizer phase noise density | foffset = 100 kHz | -97 | -92 | dB/Hz | |
φnλ(VCO) | VCO phase noise density | foffset = 10 MHz | -130 | dB/Hz | ||
Po(RF) | RF output power | measured single ended [0] | -7 | -5 | -3 | dBm |
RLout | output return loss | measured at demo board and de-embedded to footprint; |ΖS| = 50 Ω; |ΖL| = 50 Ω | -10 | dB |
型号 | 封装 | Outline version | Reflow-/Wave soldering | 包装 | 产品状态 | 标示 | 可订购的器件编号, (订购码 (12NC)) |
---|---|---|---|---|---|---|---|
TFF11080HN/N1 | HVQFN24 (SOT616-1) | sot616-1_po | sot616-1_fr | Reel 13" Q1/T1 | 开发中 | Standard Marking | TFF11080HN/N1,118( 9352 892 81118 ) |
Pin | Symbol | Description | 外形简图 | 图形符号 |
---|---|---|---|---|
1 | VREGVCO | Regulated output voltage for VCO loop filter. Connect loop filter to this pin. | ||
2 | CPOUT | Charge pump output. | ||
3 | VTUNE | Tuning voltage for VCO. | ||
4 | NSL0 | Divider setting, LSB. Leave open for “1”, connect to GND for “0”. | ||
5 | NSL1 | Divider setting. Leave open for “1”, connect to GND for “0”. | ||
6 | NSL2 | Divider setting, MSB. Leave open for “1”, connect to GND for “0”. | ||
7 | LCKDET | Lock detect. Lock = 2.5 V; out of lock = 0 V. | ||
8 | GND1(REF) | Ground for REF input. Connect this pin to the exposed diepad landing. | ||
9 | IN(REF)_P | Reference signal, non-inverting input. Couple this AC to the source. | ||
10 | IN(REF)_N | Reference signal, inverting input. Couple this AC to the source. | ||
11 | GND2(REF) | Ground for REF input. Connect this pin to the exposed diepad landing. | ||
12 | VCC(REF) | Supply of the internal regulated voltages. Decouple this pin against GND2(REF) (pin 11). | ||
13 | VCC(DIV) | Supply of the divider and PFD/CP. Decouple this pin against GND(DIV) (pin 14) | ||
14 | GND(DIV) | Ground of the divider. Connect this pin to the exposed diepad landing. | ||
15 | n.c. | not connected. | ||
16 | n.c. | not connected. | ||
17 | GND1(BUF) | Ground for RF output. Connect this pin to the exposed diepad landing. | ||
18 | VCC(BUF) | Supply voltage for the RF output buffer. Decouple this pin against GND2(BUF) pin (19) | ||
19 | GND2(BUF) | Ground for RF output. Connect this pin to the exposed diepad landing. | ||
20 | BUF1_N | RF output. | ||
21 | BUF2_N | RF output. | ||
22 | BUF1_P | RF output. | ||
23 | BUF2_P | RF output. | ||
24 | GND3(BUF) | Ground for RF output. Connect this pin to the exposed diepad landing. |
型号 | 可订购的器件编号 | RoHS / RHF | 无铅转换日期 | 潮湿敏感度等级 | MSL LF |
---|---|---|---|---|---|
TFF11080HN/N1 | TFF11080HN/N1,118 | Always Pb-free | 1 | 1 |
档案名称 | 标题 | 类型 | 格式 | 日期 |
---|---|---|---|---|
75017347 | Enabling the Mobile Experience | Brochure | 2013-02-05 | |
PllApplet_2008-03-11 | LO PLL calculator | Other type | zip | 2008-11-03 |
UM10484 | Integrated clean-up-PLL, TFF1xxxx and buffer amplifier | User manual | 2012-10-22 | |
SOT616-1_118 | HVQFN24; reel pack; standard product orientation; 12NC ending 118 | Packing | 2014-01-16 | |
sot616-1_po | plastic thermal enhanced very thin quad flat package; no leads; 24 terminals; body 4 x 4 x 0.85 mm | Outline drawing | 2002-10-21 | |
sot616-1_fr | Footprint for reflow soldering SOT616-1 | Reflow soldering | 2009-10-08 |
型号 | 订购码 (12NC) | 可订购的器件编号 |
---|---|---|
TFF11080HN/N1 | 9352 892 81118 | TFF11080HN/N1,118 |