MC10EP08: 3.3 V / 5.0 V Differential 2-Input XOR/XNOR Gate _ BDTIC 中国领先电子元器件代理商

MC10EP08: 3.3 V / 5.0 V Differential 2-Input XOR/XNOR Gate

The MC10EP08 is a differential XOR/XNOR gate. The EP08 is ideal for applications requiring the fastest AC performance available.The 100 Series contains temperature compensation.

特性

250 ps Typical Propagation Delay
Maximum Frequency > 3 Ghz Typical
PECL Mode Operating Range: VCC= 3.0 V to 5.5 V with VEE= 0 V
NECL Mode Operating Range:VCC= 0 V with VEE= -3.0 V to -5.5 V
Open Input Default State
Safety Clamp on Inputs
Q Output Will Default LOW with Inputs Open or at VEE

封装

MC10EP08 封装

应用注释 (11)

Document Title	Document ID/Size	Revision	Revision Date
AC Characteristics of ECL Devices	AND8090/D (896.0kB)	1
Clock Generation and Clock and Data Marking and Ordering Information Guide	AND8002/D (71kB)	12
Designing with PECL (ECL at +5.0 V)	AN1406/D (105.0kB)	2
ECL Clock Distribution Techniques	AN1405/D (54.0kB)	1
ECLinPS Plus™ Spice Modeling Kit	AND8009/D (343.0kB)	11
Interfacing Between LVDS and ECL	AN1568/D (121.0kB)	11
Interfacing with ECLinPS	AND8066/D (72kB)	3
Metastability and the ECLinPS Family	AN1504/D (103.0kB)	3
Odd Number Divide By Counters with 50% Outputs and Synchronous Clocks	AND8001/D (90.0kB)	0
Termination of ECL Logic Devices	AND8020/D (176.0kB)	6
The ECL Translator Guide	AN1672/D (142.0kB)	12

数据表 (1)

Document Title	Document ID/Size	Revision	Revision Date
3.3 V / 5 V Differential 2-Input XOR/XNOR	MC10EP08/D (172kB)	7	Aug, 2016

仿真模型 (4)

Document Title	Document ID/Size	Revision	Revision Date
IBIS Model for mc10ep08d -3.3V	MC10EP08D_-33.IBS (5.0kB)	1
IBIS Model for mc10ep08d -5.0V	MC10EP08D_-50.IBS (6.0kB)	1
IBIS Model for mc10ep08d 3.3V	MC10EP08D_33.IBS (6.0kB)	1
IBIS Model for mc10ep08d 5.0V	MC10EP08D_50.IBS (5.0kB)	1

封装图纸 (2)

Document Title	Document ID/Size	Revision
SOIC-8 Narrow Body	751-07 (62.6kB)	AK
TSSOP 8 3.0x3.0x0.95 mm	948R-02 (77.3kB)	A

产品订购型号

产品	状况	Compliance	封装		MSL*	容器		预算价格 (1千个数量的单价）
MC10EP08DG	Active	Pb-free Halide free	SOIC-8	751-07	1	Tube	98	联系BDTIC
MC10EP08DR2G	Active	Pb-free Halide free	SOIC-8	751-07	1	Tape and Reel	2500	联系BDTIC
MC10EP08DTG	Active	Pb-free Halide free	TSSOP-8	948R-02	3	Tube	100	联系BDTIC
MC10EP08DTR2G	Lifetime	Pb-free Halide free	TSSOP-8	948R-02	3	Tape and Reel	2500

订购产品技术参数

Product	Type	Channels	Input Level	Output Level	VCC Typ (V)	fToggle Max (MHz)	tpd Typ (ns)	tJitter Typ (ps)	tR & tF Max (ps)
MC10EP08DG	XOR/XNOR	1	ECL CML	ECL	5 3.3	3000	0.25	0.2	170
MC10EP08DR2G	XOR/XNOR	1	ECL CML	ECL	3.3 5	3000	0.25	0.2	170
MC10EP08DTG	XOR/XNOR	1	ECL CML	ECL	3.3 5	3000	0.25	0.2	170

3.3 V / 5 V Differential 2-Input XOR/XNOR (172kB) MC10EP08

AC Characteristics of ECL Devices NB100LVEP91

Clock Generation and Clock and Data Marking and Ordering Information Guide NB100LVEP91

Designing with PECL (ECL at +5.0 V) NB100LVEP91

ECL Clock Distribution Techniques NB100LVEP91

ECLinPS Plus™ Spice Modeling Kit MC10EPT20

Interfacing Between LVDS and ECL NB100ELT23L

Interfacing with ECLinPS NB100LVEP91

Metastability and the ECLinPS Family MC10EPT20

Odd Number Divide By Counters with 50% Outputs and Synchronous Clocks NUP4201

Termination of ECL Logic Devices NB100LVEP91

The ECL Translator Guide NB100LVEP91

IBIS Model for mc10ep08d -3.3V MC10EP08

IBIS Model for mc10ep08d -5.0V MC10EP08

IBIS Model for mc10ep08d 3.3V MC10EP08

IBIS Model for mc10ep08d 5.0V MC10EP08

SOIC-8 Narrow Body CM1216

TSSOP 8 3.0x3.0x0.95 mm NB100ELT23L

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