MC10EP142: 3.3 V / 5.0 V ECL 9-Bit Shift Register
The MC10EP/100EP142 is a 9-bit shift register, designed with byte-parity applications in mind. The E142 performs serial/parallel in and serial/parallel out, shifting in one direction. The nine inputs D0 - D8 accept parallel input data, while S-IN accepts serial input data. The Qn outputs do not need to be terminated for the shift operation to function. To minimize noise and power, any Q output not used should be left unterminated.The SEL (Select) input pin is used to switch between the two modes of operation - SHIFT and LOAD. The shift direction is from bit 0 to bit 8. Input data is accepted by the registers a set-up time before the positive going edge of CLK0 or CLK1; shifting is also accomplished on the positive clock edge. A HIGH on the Master Reset pin (MR) asynchronously resets all the resisters to zero.The 100 Series contains temperature compensation.
特性- > 3 GHz Minimum Shift Frequency
- 9-Bit for Byte-Parity Applications
- Asynchronous Master Reset
- Dual Clocks
- PECL Mode Operating Range: VCC = 3.0 V to 5.5 V with VEE = 0 V
- NECL Mode Operating Range: VCC = 0 V with VEE = –3.0 V to –5.5 V
- Open Input Default State
- Safety Clamp on Inputs
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封装
应用注释 (9)
封装图纸 (1)
数据表 (1)
产品订购型号
| 产品 | 状况 | Compliance | 封装 | MSL* | 容器 | 预算价格 (1千个数量的单价） |
|---|
| MC10EP142FAG | Active | Pb-free
Halide free | LQFP-32 | 联系BDTIC | 2 | Tray JEDEC | 250 | 联系BDTIC |
| MC10EP142FAR2G | Lifetime | Pb-free
Halide free | LQFP-32 | 联系BDTIC | 2 | Tape and Reel | 2000 | |
| MC10EP142MNG | Last Shipments | Pb-free
Halide free | QFN-32 | 488AM | 1 | Tube | 74 | |
| MC10EP142MNR4G | Lifetime | Pb-free
Halide free | QFN-32 | 488AM | 1 | Tape and Reel | 1000 | |
订购产品技术参数
| Product | Type | Bits | Input Level | Output Level | VCC Typ (V) | tJitter Typ (ps) | tpd Typ (ns) | tsu Min (ns) | th Min (ns) | trec Typ (ns) | tR & tF Max (ps) | fToggle Typ (MHz) |
|---|
| MC10EP142FAG | Shift Register | 9 | ECL
CML | ECL | 3.3
5 | 1 | 0.675 | 0.05 | 0.1 | 0.8 | 250 | 2800 |
