MC10H605: REG Hex ECL/TTL Translator
The MC10/100H605 is a 6-bit, registered, dual supply ECL to TTL translator. The device features differential ECL inputs for both data and clock. The TTL outputs feature balanced 24mA sink/source capabilities for driving transmission lines. With its differential ECL inputs and TTL outputs the H605 device is ideally suited for the receive function of a HPPI bus type board-to board interface application. The on chip registers simplify the task of synchronizing the data between the two boards. A VBB reference voltage is supplied for use with single ended data or clock. For single-ended applications the VBB output should be connected to the "bar" inputs (Dn or CLK) and bypassed to ground via a 0.01uF capacitor. To minimize the skew of the device differential clocks should be used. The ECL level Master Reset pin is asynchronous and common to all flip-flops. A "HIGH" on the Master Reset forces the Q outputs "LOW". The device is available in either ECL standard: the 10H device is compatible with MECL 10H logic levels while the 100H device is compatible with 100K logic levels.
特性- Differential ECL Data and Clock Inputs
- 24mA Sink, 24mA Source TTL Outputs
- Dual Power Supply
- Multiple Power and Ground Pins to Minimize Noise
- 2.0ns Part-to-Part Skew
- Pb-Free Packages are Available
|
应用注释 (14)
封装图纸 (1)
Document Title | Document ID/Size | Revision |
---|
28 LEAD PLCC | 776-02 (67.7kB) | F |
数据表 (1)
产品订购型号
产品 | 状况 | Compliance | 具体说明 | 封装 | MSL* | 容器 | 预算价格 (1千个数量的单价) |
---|
MC10H605FNG | Active | Pb-free
Halide free | REG Hex ECL/TTL Translator | PLCC-28 | 776-02 | 3 | Tube | 37 | 联系BDTIC |
订购产品技术参数
Product | Channels | Input Level | Output Level | VCC Typ (V) | fMax Typ (MHz) | tpd Typ (ns) | tR & tF Max (ps) |
---|
MC10H605FNG | 6 | ECL | TTL | 5 | | 5.2 | 1500 |