MC74AC273: Octal D Flip-Flop
The MC74AC273/74ACT273 has eight edge-triggered D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock (CP) and Master Reset (MR) inputs load and reset (clear) all flip-flops simultaneously. The register is fully edge-triggered. The state of each D input, one setup time before the LOW-to-HIGH clock transition, is transferred to the corresponding flip- flop's Q output. All outputs will be forced LOW independently of Clock or Data inputs by a LOW voltage level on the MR input. The device is useful for applications where the true output only is required and the Clock and Master Reset are common to all storage elements.
特性- Ideal Buffer for MOS Microprocessor or Memory
- Eight Edge-Triggered D Flip-Flops
- Buffered Common Clock
- Buffered, Asynchronous Master Reset
- See MC74AC377 for Clock Enable Version
- See MC74AC373 for Transparent Latch Version
- See MC74AC374 for 3-State Version
- Outputs Source/Sink 24 mA
- ACT273 Has TTL Compatible Inputs
- Pb-Free Packages are Available
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仿真模型 (4)
封装图纸 (2)
数据表 (1)
| Document Title | Document ID/Size | Revision | Revision Date |
|---|
| Octal D Flip Flop | MC74AC273/D (91kB) | 8 | |
产品订购型号
| 产品 | 状况 | Compliance | 封装 | MSL* | 容器 | 预算价格 (1千个数量的单价） |
|---|
| MC74AC273DTR2G | Active | Pb-free
Halide free | TSSOP-20 | 948E-02 | 1 | Tape and Reel | 2500 | $0.2267 |
| MC74AC273DWG | Active | Pb-free
Halide free | SOIC-20W | 751D-05 | 3 | Tube | 38 | $0.2667 |
| MC74AC273DWR2G | Active | Pb-free
Halide free | SOIC-20W | 751D-05 | 3 | Tape and Reel | 1000 | $0.2667 |
订购产品技术参数
| Product | Type | Channels | VCC Min (V) | VCC Max (V) | tpd Max (ns) | IO Max (mA) |
|---|
| MC74AC273DTR2G | D-Type | 8 | 2 | 6 | 10 | 24 |
| MC74AC273DWG | D-Type | 8 | 2 | 6 | 10 | 24 |
| MC74AC273DWR2G | D-Type | 8 | 2 | 6 | 10 | 24 |
