N08L63W2A: 8 Mb, 3 V Parallel SRAM Memory
The N08L63W2A is an integrated memory device containing a 8 Mbit Static Random Access Memory organized as 524,288 words by 16 bits. The device is designed and fabricated using advanced CMOS technology from ON Semiconductor to provide both high-speed performance and ultra-low power. The device operates with two chip enable (CE1 and CE2) controls and output enable (OE) to allow for easy memory expansion. Byte controls (UB and LB) allow the upper and lower bytes to be accessed independently and can also be used to deselect the device. The N08L63W2A is optimal for various applications where low-power is critical such as battery backup and hand-held devices. The device can operate over a very wide temperature range of -40°C to +85°C and is available in JEDEC standard packages compatible with other standard 512 kb x 16 SRAMs.
特性- Single wide power supply range - 2.3 to 3.6 V
- Very low standby current - 4.0µA at 3.0V (Typical)
- Very low operating current - 2.0mA at 3.0V and 1µs(Typical)
- Very low page mode operating current - 1.0mA at 3.0V and 1µs (Typical)
- Simple memory control: dual chip enables (CE1 and CE2); byte control for independent byte operation; output enable (OE) for memory expansion
- Low voltage data retention - Vcc = 1.8V
- Very fast output enable access time - 25ns OE access time
- Very fast page mode access time - tAAP = 25ns
- Automatic power down to standby mode
- TTL compatible three-state output driver
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产品订购型号
| 产品 | 状况 | Compliance | 具体说明 | 封装 | MSL* | 容器 | 预算价格 (1千个数量的单价） |
|---|
| N08L63W2AB27I | Last Shipments | Pb-free | 8 Mb, 3 V Parallel SRAM Memory | | 联系BDTIC | 3 | Tray JEDEC | 220 | |
| N08L63W2AB7I | Product Preview | | 8 Mb, 3 V Parallel SRAM Memory | | 联系BDTIC | | Tray JEDEC | 1 | 联系BDTIC |
订购产品技术参数
| Product | Type | Density | Organization (bits) | fcycle Max (MHz) | VCC Min (V) | VCC Max (V) | Istandby Typ (µA) | Iact Max (µA) |
|---|
| N08L63W2AB7I | Parallel | 8 Mb | 512k x 16 | | 2.3 | 3.6 | 4 | 20 |
