NB3N3002: Clock Generator, PureEdge™, Crystal to 25 MHz, 100 MHz, 125 MHz, 200 MHz, 3.3 V, with Differential HCSL Outputs

The NB3N3002 is a high precision, low phase noise clock generator that supports PCI-Express and Ethernet requirements. The device takes a 25 MHz fundamental mode parallel resonant crystal and generates differential HCSL output at 25 MHz, 100 MHz, 125 MHz or 200 MHz clock frequencies. This device is housed in 5.0 mm x 4.4 mm narrow body TSSOP 16 pin package.

特性
  • Typical TIE RMS jitter of 2.5 ps
  • Uses 25 MHz Fundamental Mode Parallel Resonant Crystal
  • HCSL Differential Output
  • Operating Range 3.3 V 5%
  • Industrial Temperature Range -40C to +85C
优势
  • Best in Class Jitter Performance for HCSL Clock Generator
应用
  • Gigabit Ethernet
  • FBDIMM
  • PCIe Gen I, Gen II and Gen III
终端产品
  • Servers
  • Networking Equipment
应用注释 (2)
Document TitleDocument ID/SizeRevisionRevision Date
A System Designer's Guide for Building a PCIe Clock Tree while Addressing Timing ChallengesAND9202/D (179kB)1Mar, 2015
Storage and Handling of Drypack Surface Mount DeviceAND8003/D (49kB)2Mar, 2016
数据表 (1)
Document TitleDocument ID/SizeRevisionRevision Date
Clock Generator, 25 MHz, 100 MHz, 125 MHz, 200 MHz PureEdge™, HCSLNB3N3002/D (124032kB)6
仿真模型 (1)
Document TitleDocument ID/SizeRevisionRevision Date
NB3N3002 IBIS ModelNB3N3002.IBS (67.0kB)4Aug, 2007
封装图纸 (1)
Document TitleDocument ID/SizeRevision
TSSOP-16948F-01 (41.7kB)B
产品订购型号
产品状况Compliance封装MSL*容器预算价格 (1千个数量的单价)
NB3N3002DTGActivePb-free Halide freeTSSOP-16948F-011Tube96联系BDTIC
NB3N3002DTR2GActivePb-free Halide freeTSSOP-16948F-011Tape and Reel2500联系BDTIC
订购产品技术参数
ProductInput LevelOutput LevelVS Typ (V)fin Typ (MHz)fout Typ (MHz)tJitter(Cy-Cy) Typ (ps)tJitter(Period) Typ (ps)tJitter(Φ) Typ (ps)tR & tF Typ (ps)tR & tF Max (ps)TA Min (°C)TA Max (°C)
NB3N3002DTGTTL CMOSHCSL3.465 3.13525125 200 100 2521.50.25340700-4085
NB3N3002DTR2GCMOS TTLHCSL3.465 3.1352525 200 125 10021.50.25340700-4085
Clock Generator, 25 MHz, 100 MHz, 125 MHz, 200 MHz PureEdge™, HCSL (124032kB) NB3N3002
A System Designer's Guide for Building a PCIe Clock Tree while Addressing Timing Challenges NCN2612B
Storage and Handling of Drypack Surface Mount Device NB3U23C
NB3N3002 IBIS Model NB3N3002
TSSOP-16 MC14504B