NB4L858M: 2x2 Crosspoint Switch, 2.5 V / 3.3 V, 3 GHz Dual Differential Clock/Data, with CML Output and Internal Termination

The NB4L858M is a high−bandwidth low voltage fully differential dual 2 x 2 crosspoint switch with CML outputs that is suitable for applications such as SDH/SONET DWDM and high speed switching applications. Design technique minimizes jitter accumulation,crosstalk, and signal skew which make this device ideal for loop−through and protection channel switching application. Each 2 x 2 crosspoint switch can fan out and/or multiplex up to 3Gb/s data and 3 GHz clock signals.Differential inputs incorporate a pair of internal 50 Ω termination resistors in a center−tapped configuration (VTDx Pins) and can accept LVPECL (Positive ECL) or CML input signal without any external component. This feature provides transmission line termination on−chip, at the receiver end, eliminating external components. Differential 16 mA CML output provides matching internal 50 Ω terminations, and 400 mV output swings when externally terminated, 50 Ω to VCC.The SELECT inputs are single−ended and can be driven with either LVCMOS or LVTTL input levels. The device is housed in a low profile 7 x 7 mm 32−pin LQFP package.

特性
  • Maximum Input Clock Frequency 3 GHz
  • Maximum Input Data Frequency 3 Gb/s
  • 350 ps Typical Propagation Delay
  • 80 ps Typical Rise and Fall Times
  • 12 ps Channel to Channel Skew
  • 0.5 ps RMS Jitter
  • 5 ps Deterministic Jitter @ 2.5 Gb/s
应用
  • Crosspoint switch for Networking, ATE and Computing
应用注释 (5)
Document TitleDocument ID/SizeRevisionRevision Date
AC Characteristics of ECL DevicesAND8090/D (896.0kB)1
Clock Generation and Clock and Data Marking and Ordering Information GuideAND8002/D (71kB)12
ECLinPS Plus™ Spice Modeling KitAND8009/D (343.0kB)11
Storage and Handling of Drypack Surface Mount DeviceAND8003/D (49kB)2Mar, 2016
Termination and Interface of ON Semiconductor ECL Logic Devices with CML (Current Mode Logic) Output StructureAND8173/D (144.0kB)3
数据表 (1)
Document TitleDocument ID/SizeRevisionRevision Date
2x2 Crosspoint Switch, 2.5 V / 3.3 V, 3 GHz Dual Differential Clock/Data, with CML Output and Internal TerminationNB4L858M/D (98.0kB)0
仿真模型 (2)
Document TitleDocument ID/SizeRevisionRevision Date
ECLinPS Plus SPICE Modeling KitAND8009 (343.0kB)11
IBIS Model for NB4L858M at 33 VNB4L858M_33.IBS (29.0kB)1
产品订购型号
产品状况Compliance封装MSL*容器预算价格 (1千个数量的单价)
NB4L858MFAGActivePb-free Halide freeLQFP-32联系BDTIC2Tray JEDEC250联系BDTIC
NB4L858MFAR2GActivePb-free Halide freeLQFP-32联系BDTIC2Tape and Reel2000联系BDTIC
订购产品技术参数
ProductInput/Output RatioChannelsInput LevelOutput LevelVCC Typ (V)fMax Typ (MHz)tJitter Typ (ps)tskew(OO) Max (ps)tpd Typ (ns)
NB4L858MFAG2:14CML ECLCML2.50.512350
NB4L858MFAR2G2:14ECL CMLCML2.50.512350
2x2 Crosspoint Switch, 2.5 V / 3.3 V, 3 GHz Dual Differential Clock/Data, with CML Output and Internal Termination (98.0kB) NB4L858M
AC Characteristics of ECL Devices NB100LVEP91
Clock Generation and Clock and Data Marking and Ordering Information Guide NB100LVEP91
ECLinPS Plus™ Spice Modeling Kit MC10EPT20
Storage and Handling of Drypack Surface Mount Device NB3U23C
Termination and Interface of ON Semiconductor ECL Logic Devices with CML (Current Mode Logic) Output Structure NB6L295M
ECLinPS Plus SPICE Modeling Kit NB4N840M
IBIS Model for NB4L858M at 33 V NB4L858M