NB6L11M: Clock / Data Fanout Buffer, 1:2 Differential, with CML Outputs
The NB6L11M is a differential 1:2 CML fanout buffer. The differential inputs incorporate internal 50-ohm termination resistors that are accessed through the VT pins and will accept LVPECL, LVCMOS, LVTTL, CML, or LVDS logic levels. The VREFAC pin is an internally generated voltage supply available to this device only. VREFAC is used as a reference voltage for single-ended PECL or NECL inputs. For all single-ended input conditions, the unused complementary differential input is connected to VREFAC as a switching reference voltage. VREFAC may also rebias capacitor-coupled inputs. When used, decouple VREFAC with a 0.01uF capacitor and limit current sourcingor sinking to 0.5 mA. When not used, VREFAC output should be left open. The device is housed in a small 3x3 mm 16 pin QFN package. The NB6L11M is a member of the ECLinPS MAX family of high performance clock products.
特性- Maximum Input Clock Frequency > 4 GHz
- 0.5ps max Random Clock Jitter
- VREFAC Reference Output
- Internal Input Termination Resistors, 50-ohm
| 优势- High performance applications
- Low Jitter Outputs
- Rebias Capacitor-coupled Input signal
- No external components needed for inputs
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应用- Clock / Data Distribution
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应用注释 (1)
数据表 (1)
仿真模型 (2)
封装图纸 (1)
产品订购型号
产品 | 状况 | Compliance | 封装 | MSL* | 容器 | 预算价格 (1千个数量的单价) |
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NB6L11MMNG | Active | Pb-free
Halide free | QFN-16 | 485G-01 | 1 | Tube | 123 | 联系BDTIC |
NB6L11MMNR2G | Active | Pb-free
Halide free | QFN-16 | 485G-01 | 1 | Tape and Reel | 3000 | 联系BDTIC |
订购产品技术参数
Product | Type | Channels | Input / Output Ratio | Input Level | Output Level | VCC Typ (V) | tJitterRMS Typ (ps) | tskew(o-o) Max (ps) | tpd Typ (ns) | tR & tF Max (ps) | fmaxClock Typ (MHz) | fmaxData Typ (Mbps) |
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NB6L11MMNG | Buffer | 1 | 1:2 | LVDS
CML
LVTTL
LVCMOS
LVPECL | CML | 3.3
2.5 | 0.2 | 15 | 0.225 | 120 | 4000 | |
NB6L11MMNR2G | Buffer | 1 | 1:2 | LVPECL
LVTTL
CML
LVDS
LVCMOS | CML | 2.5
3.3 | 0.2 | 15 | 0.225 | 120 | 4000 | |