NB7V32M: 1.8 V / 2.5 V, 10 GHz ÷·2 Clock Divider with CML Outputs
The NB7V32M is a differential divide-by-2 Clock divider with asynchronous reset. The differential Clock inputs incorporate internal 50-ohm termination resistors and will accept LVPECL, CML and LVDS logic levels. The NB7V32M produces a divide-by-2 output copy of an input Clock operating up to 10GHz with minimal jitter. The Reset pin is asserted on the rising edge. Upon power-up, the internal flip-flops will attain a random state; the Reset allows for the synchronization of multiple NB7V32M's in a system. The 16mA differential CML output provides matching internal 50-ohm termination which guarantees 400mV output swing when externally receiver terminated with 50-ohm to VCC. The NB7V32M is the 1.8V/2.5V version of the NB7L32M 2.5V/3.3V and is offered in a low profile 3mm x 3mm 16-pin QFN package.
特性- Maximum Input Clock Frequency > 10 GHz, typical
- Random Clock Jitter < 0.8ps RMS
- 30ps Typical Rise and Fall Times
- Differential CML Outputs, 400mV peak-to-peak, typical
- -40C to +85C Ambient Operating Temperature
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应用 | 终端产品- Instumentation, Networking
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数据表 (1)
评估板文档 (1)
封装图纸 (1)
评估板与开发工具
产品 | 状况 | Compliance | 简短说明 |
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NB7V32MMNGEVB | Active | Pb-free | Differential Clock Divider Evaluation Border |
产品订购型号
产品 | 状况 | Compliance | 封装 | MSL* | 容器 | 预算价格 (1千个数量的单价) |
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NB7V32MMNG | Active | Pb-free
Halide free | QFN-16 | 485G-01 | 1 | Tube | 123 | 联系BDTIC |
NB7V32MMNHTBG | Active | Pb-free
Halide free | QFN-16 | 485G-01 | 1 | Tape and Reel | 100 | 联系BDTIC |
NB7V32MMNTXG | Active | Pb-free
Halide free | QFN-16 | 485G-01 | 1 | Tape and Reel | 3000 | 联系BDTIC |
订购产品技术参数
Product | Type | Input Level | Output Level | VCC Typ (V) | fMax Typ (MHz) | tpd Typ (ns) | tR & tF Max (ps) |
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NB7V32MMNG | Divider | LVDS
ECL
CML | CML | 2.5
1.8 | 10000 | 0.2 | 60 |
NB7V32MMNHTBG | Divider | CML
ECL
LVDS | CML | 2.5
1.8 | 10000 | 0.2 | 60 |
NB7V32MMNTXG | Divider | CML
LVDS
ECL | CML | 2.5
1.8 | 10000 | 0.2 | 60 |