NB7V52M: D Flip Flop, 1.8 V / 2.5 V Differential, with Reset and CML Outputs

The NB7V52M is a 10GHz differential Data and Clock D flip-flop with a Differential asynchronous Reset. The differential D/Db, CLK/CLKb and R/Rb inputs incorporate internal 50-ohm termination resistors and will accept LVPECL, CML, LVDS logic levels. When Clock transitions from Low to High, Data will be transferred to the differential CML outputs. The differential Clock inputs allow the NB7V52M to also be used as a negative edge triggered device. The 16mA differential CML outputs provide matching internal 50-ohm terminations and produce 400 mV output swings when externally terminated with a 50-ohm resistor to VCC. The NB7V52M is offered in a low profile 3mm x 3mm 16-pin QFN package.

特性

Maximum Input Clock Frequency > 10GHz Typical
Random Clock Jitter < 0.8ps RMS
30ps Typical Rise and Fall Times
Differential CML Outputs, 400mV peak-to-peak, typical
Operating Range: VCC = 1.71V to 2.625V with VEE = 0V
Internal 50-ohm Input Termination Resistors
-40C to +85C Ambient Operating Temperature
Instrumentation

应用

Test & Measurement, ATE

终端产品

Instrumentation

数据表 (1)

Document Title	Document ID/Size	Revision	Revision Date
D Flip Flop, 1.8 V / 2.5 V Differential, with Reset and CML Outputs	NB7V52M/D (84kB)	4

评估板文档 (2)

Document Title	Document ID/Size	Revision	Revision Date
NB752MMNGEVB Evaluation Board User's Manual	EVBUM2305/D (661kB)	0	Jul, 2015
NB7V52MMNGEVB Gerber Layout Files (Zip Format)	NB7V52MMNGEVB_GERBER.zip (284kB)	0

封装图纸 (1)

Document Title	Document ID/Size	Revision
QFN16, 3x3, 0.5P	485G-01 (57.3kB)	F

评估板与开发工具

产品	状况	Compliance	简短说明
NB7V52MMNGEVB	Active	Pb-free	1.8 V / 2.5 V Differential D Flip Flop Evaluation Board

产品订购型号

产品	状况	Compliance	封装		MSL*	容器		预算价格 (1千个数量的单价）
NB7V52MMNG	Active	Pb-free Halide free	QFN-16	485G-01	1	Tube	123	联系BDTIC
NB7V52MMNHTBG	Active	Pb-free Halide free	QFN-16	485G-01	1	Tape and Reel	100	联系BDTIC
NB7V52MMNTXG	Active	Pb-free Halide free	QFN-16	485G-01	1	Tape and Reel	3000	联系BDTIC

订购产品技术参数

Product	Type	Bits	Input Level	Output Level	VCC Typ (V)	tJitter Typ (ps)	tpd Typ (ns)	tsu Min (ns)	th Min (ns)	trec Typ (ns)	tR & tF Max (ps)	fToggle Typ (MHz)
NB7V52MMNG	D-Type	1	ECL LVDS CML	CML	1.8 2.5	0.2	0.2	0.04	0.05	0.2	50	12000
NB7V52MMNHTBG	D-Type	1	CML LVDS ECL	CML	1.8 2.5	0.2	0.2	0.04	0.05	0.2	50	12000
NB7V52MMNTXG	D-Type	1	LVDS CML ECL	CML	2.5 1.8	0.2	0.2	0.04	0.05	0.2	50	12000