UPD70F3924GF-GAT-AX _ BDTIC 中国领先电子元器件代理商

UPD70F3924GF-GAT-AX

**DataSheet 数据书册**
下载文件
UPD70F3924GF-GAT-AX.pdf

**相关开发工具**
型号	厂家	状态
R0E000200KCT00	Renesas	MassProduction
R0E000010KCE00	Renesas	MassProduction

**Basic Information**
Product Status	Non-promotion
Family	V850
Series	V850E/Ix
Group	V850E/IG4, V850E/IH4, V850E/IG4-H, V850E/IH4-H

**Memory**
Program memory	480 KB Flash memory
RAM	24 KB

**CPU (Bit, Clock, DMA, External Bus etc)**
CPU	V850E1 (32-bit)
Max. Frequency	100 MHz
PLL	YES
Power-On Reset	YES
Low Voltage Detection	YES
DMA Remarks	DMAC x 7 ch
External Address/Data Bus	YES
External Interrupt Pins	22
I/O Ports	80

**Timers**
16-bit Timers	13 ch
Watchdog Timers	1 ch
Other Timers	Timer for Moter Control (TAB2ch+TAA2ch)
PWM Output	22
3-Phase PWM Output Function	YES

**Analog**
A/D Converters	10-bit x 12 ch, 12-bit x 8 ch

**Interfaces**
USB Ports	1
USB Peripheral	YES
USB Remarks	Provides free sample code for USB CDC.
CSIs	3 ch
UARTs	4 ch
I2Cs	1 ch

**Operating Conditions**
Operating Voltage	3.5 to 5.5 V
Power Supply	1.35 - 1.65 V (For CPU core)
Operating Temperature	-40 to 85 ℃ (Ambient Temperature)

**Remarks**
Remarks	128-pin on-chip USB controller for motor inverter control 32-bit microcontroller V850E/IH4-H (100 MHz, Flash ROM: 480 KB, RAM: 24 KB)

**Package**
Pins	128
Terminal pitch (mm)	0.5 mm
Package Type	LFQFP
Dimensions (mm)	14x20 mm²
Drawing Link	p128gf-50-gat
Mount pad	fig0009e
Mounting height (mm)[MAX]	1.6 mm
Mass (g) [TYP,]	0.93 g
Renesas code	PLQP0128KE-A (old: P128GF-50-GAT-2 )
JEITA code	P-LFQFP128-14x20-0.50
Remarks	LQFP(matrix line),PPF TYPE
Terminal material - Base	Cu alloy
Terminal material - Surface	Ni/Pd/Au

订购型号

型号	状态	产品长期供应计划	预算价格（1000片）	包装	明星产品	RoHS
UPD70F3924GF(S)-GAT-AX	Non-promotion	Jan, 2024		\| MOQ:\| WRAP_SPEC:\| OTHER_ENV:	false	无铅
UPD70F3924GF(R)-GAT-AX	Non-promotion	Jan, 2024		\| MOQ:\| WRAP_SPEC:\| OTHER_ENV:	false	无铅

V850E/IG4-H, V850E/IH4-H User's Manual: Hardware Sep.30.11;Rev.3.00;7 Mbytes

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