技术特性

• Memories
  • 16K to 60K dual voltage High Density Flash (HDFlash) or up to 32K ROM with read-outprotection capability. In-Application Programming and In-Circuit Programming for HDFlash devices
  • 512 to 2048 bytes RAM
  • HDFlash endurance: 100 cycles, data retention: 40 years at 85°C
• Clock, reset and supply management
  • Enhanced low voltage supervisor (LVD) for main supply and auxiliary voltage detector(AVD) with interrupt capability
  • Clock sources: crystal/ceramic resonator oscillators, internal RC oscillator and bypass for external clock
  • PLL for 2x frequency multiplication
  • Four Power Saving Modes: Halt, Active-Halt,Wait and Slow
  • Clock Security System
• Interrupt management
  • Nested interrupt controller
  • 14 interrupt vectors plus TRAP and RESET
  • Top Level Interrupt (TLI) pin on 64-pin devices
  • 9/6 external interrupt lines (on 4 vectors)
• Up to 48 I/O ports
  • 48/36/32/24 multifunctional bidirectional I/O lines
  • 34/26/22/17 alternate function lines
  • 16/13/12/10 high sink outputs
• 5 timers
  • Main Clock Controller with: Real time base, Beep and Clock-out capabilities
  • Configurable watchdog timer
  • Two 16-bit timers with: 2 input captures, 2 output compares, external clock input on one timer, PWM and pulse generator modes
  • 8-bit PWM Auto-reload timer with: 2 input captures, 4 PWM outputs, output compare and time base interrupt, external clock with event detector
• 3 Communications interfaces
  • SPI synchronous serial interface
  • SCI asynchronous serial interface
  • I²C multimaster interface
• 1 Analog peripheral (low current coupling)
  • 10-bit ADC with up to 16 robust input ports
• Instruction set
  • 8-bit Data Manipulation
  • 63 Basic Instructions
  • 17 main Addressing Modes
  • 8 x 8 Unsigned Multiply Instruction
• Development tools
  • Full hardware/software development package
  • DM (Debug module)

功能框图