技术特性

• Memories
  • 8K dual voltage high density Flash (HDFlash) or ROM with read-out protection capability. In-application programming and in-circuit programming for HDFlash devices
  • 384 bytes RAM
  • HDFlash endurance: 100 cycles, data retention: 20 years at 55°C
• Clock, reset and supply management
  • Clock sources: crystal/ceramic resonator oscillators and bypass for external clock
  • PLL for 2x frequency multiplication
  • Four power saving modes: halt, active halt, wait and slow
• Interrupt management
  • Nested interrupt controller
  • 14 interrupt vectors plus TRAP and reset
  • 6 external interrupt lines (on 4 vectors)
• Up to 32 I/O ports
  • 32/24 multifunctional bidirectional I/O lines
  • 22/17 alternate function lines
  • 12/10 high sink outputs
• 4 timers
  • Main clock controller with: real time base, beep and clock-out capabilities
  • Configurable watchdog timer
  • Two 16-bit timers with: 2 input captures, 2 output compares, PWM and pulse generator modes
• 2 communications interfaces
  • SPI synchronous serial interface
  • SCI asynchronous serial interface
• 1 analog peripheral (low current coupling)
  • 10-bit ADC with up to 12 robust input ports
• Instruction set
  • 8-bit data manipulation
  • 63 basic instructions
  • 17 main addressing modes
  • 8 x 8 unsigned multiply instruction
• Development tools
  • Full hardware/software development package
  • In-circuit testing capability

功能框图