技术特性

• Memories
  • up to 16 Kbytes Program memory: single voltage extended Flash (XFlash) with read-out and write protection, in-circuit and in-application programming (ICP and IAP). 10,000 write/erase cycles guaranteed, data retention: 20 years at 55 °C.
  • up to 1 Kbyte RAM
  • 256 bytes data EEPROM with readout protection. 300,000 write/erase cycles guaranteed, data retention: 20 years at 55 °C.
• Clock, reset and supply management
  • Power on / power off safe reset with 3 programmable threshold levels (LVD)
  • Auxiliary voltage detector (AVD)
  • Clock sources: crystal/ceramic resonator oscillators, high-accuracy internal RC oscillator or external clock
  • PLL for 4x or 8x frequency multiplication
  • 5 power-saving modes: Slow, Wait, Halt, Auto-wakeup from Halt and Active-halt
  • Clock output capability (fCPU)
• Interrupt management
  • Nested interrupt controller
  • 10 interrupt vectors plus TRAP and RESET
  • 9 external interrupt lines on 4 vectors
• Up to 34 I/O ports
  • up to 34 multifunctional bidirectional I/O lines
  • up to 12 high sink outputs (10 on 32-pin devices)
• 4 timers
  • Configurable window watchdog timer
  • Real-time base
  • 16-bit timer A with: 1 input capture, 1 output compare, external clock input, PWM and pulse generator modes
  • 16-bit timer B with: 2 input captures, 2 output compares, PWM and pulse generator modes
• 3 communication interfaces
  • I²C multimaster / slave
  • I²C slave 3 addresses, no stretch, with DMA access and byte pair coherency on I²C read
  • SCI asynchronous serial interface (LIN compatible)
  • SPI synchronous serial interface
• 1 analog peripheral
  • 10-bit ADC with 12 input channels (8 on 32-pin devices)
• Instruction set
  • 8-bit data manipulation
  • 63 basic instructions with illegal opcode detection
  • 17 main addressing modes
  • 8 x 8 unsigned multiply instruction
• Development tools
  • Full hardware/software development package
  • On-chip debug module

功能框图