技术特性

• Memories
  • 16 K to 60 K High Density Flash (HDFlash) or ROM with read-out protection capability. In-application programming and in-circuit programming for HDFlash devices
  • 1 to 2 K RAM
  • HDFlash endurance: 100 cycles, data retention 20 years at 55 °C
• Clock, reset and supply management
  • Low power crystal/ceramic resonator oscillators and bypass for external clock
  • PLL for 2 x frequency multiplication
  • 5 power saving modes: halt, auto wake up from halt, active halt, wait and slow
• Interrupt management
  • Nested interrupt controller
  • 14 interrupt vectors plus TRAP and RESET
  • TLI top level interrupt (on 64-pin devices)
  • Up to 21 ext. interrupt lines (on 4 vectors)
• Up to 48 I/O ports
  • Up to 48 multifunctional bidirectional I/Os
  • Up to 36 alternate I/O functions
  • Up to 6 high sink outputs
• 5 timers
  • 16-bit timer with 2 input captures, 2 output compares, external clock input, PWM and pulse generator modes
  • 8-bit timer with 1 or 2 input captures, 1 or 2 output compares, PWM and pulse generator modes
  • 8-bit PWM auto-reload timer with 1 or 2 input captures, 2 or 4 independent PWM output channels, output compare and time base interrupt, external clock with event detector
  • Main clock controller with real-time base and clock output
  • Window watchdog timer
• Up to 4 communications interfaces
  • SPI synchronous serial interface
  • Master/ slave LINSCI™ asynchronous serial interface
  • Master only LINSCI™ asynchronous serial interface
  • CAN 2.0B active
• Analog peripheral (low current coupling)
  • 10-bit A/D converter with up to 16 inputs
  • Up to 9 robust ports (low current coupling)
• Instruction set
  • 8-bit data manipulation
  • 63 basic instructions, 17 main addressing modes
  • 8 x 8 unsigned multiply instruction
• Development tools
  • Full hardware/ software development package

功能框图