SN74ALVCHS162830A 具有三态输出的 1 位至 2 位地址驱动器

SN74ALVCHS162830A 描述

This 1-bit to 2-bit address driver is designed for 2.3-V to 3.6-V VCC operation.

Diodes to VCC have been added on the inputs to clamp overshoot.

Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.

The outputs, which are designed to sink up to 12 mA, include series damping resistors to reduce overshoot and undershoot.

The ALVCHS162830A is an improved version of the LVCHS162830 (non-A version) and has been optimized for lower power consumption and higher AC drive. Higher AC drive provides capability to drive loads with a faster edge rate.

To ensure the high-impedance state during power up or power down, the output-enable (OE)\ input should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver

SN74ALVCHS162830A
Voltage Nodes(V) 3.3, 2.7, 2.5  
Vcc range(V) 2.3 to 3.6  
Logic True  
Input Level LVTTL  
Output Level LVTTL  
Output Drive(mA) -12/12  
No. of Gates 18  
No. of Outputs 2  
tpd max(ns) 3.5  
Static Current 0.02  
Rating Catalog  
Technology Family ALVC
SN74ALVCHS162830A 特性
SN74ALVCHS162830A 应用技术支持与电子电路设计开发资源下载
  1. SN74ALVCHS162830A 数据资料 dataSheet 下载.PDF
  2. TI 德州仪器缓冲器、驱动器/收发器产品选型与价格 . xls
  3. CMOS 非缓冲反向器在振荡器电路中的使用 (PDF 951 KB)
  4. Semiconductor Packing Methodology (PDF 3005 KB)
  5. 逻辑产品选择指南 2006/2007 (修订版 Z)(4462KB)
  6. 标准线性和逻辑产品 5 分钟指南 (786KB)
  7. 了解和解释标准逻辑数据表
  8. LOGIC Pocket Data Book (PDF 6001 KB)
  9. HiRel Unitrode Power Management Brochure (PDF 206 KB)
  10. Logic Cross-Reference (PDF 2938 KB)