This Evaluation Module (EVM) facilitates the experimental testing of the Texas Instruments SN65LVDS20 Repeater/Translator silicon device. This device accepts low-voltage PECL input levels and Translates them to LVDS output levels as defined by TIA/EIA-644-A standard.
The device operates at rates to 4Gbps or clock rates to 2 GHz at either 3.3 V or 2.5 V supply operation, with less than 45 ps of total jitter. The device output can be disabled to the high impedance state by applying a logic High level to the EN bar pin.
This device also provides a voltage reference output (Vbb) of typically 1.35 V below Vcc for use in receiving single-ended PECL input signals
| 器件型号 | 名称 | 产品系列 |
| SN65LVDS20 | 4Gbps PECL 至 LVPECL 中继器 | LVDS/SN65LVDS20/ECL/CML |
