AD606JR: 对数放大器和检测器PDIP-16封装
The AD606 is a complete, monolithic logarithmic amplifier using a 9-stage "successive-detection" technique. It provides both logarithmic and limited outputs. The logarithmic output is from a three-pole post-demodulation low-pass filter and provides a loadable output voltage of +0.1 V dc to +4 V dc. The logarithmic scaling is such that the output is +0.5 V for a sinusoidal input of -75 dBm and +3.5 V at an input of +5 dBm; over this range the logarithmic linearity is typically within ±0.4 dB. All scaling parameters are proportional to the supply voltage.
The AD606 can operate above and below these limits, with reduced linearity, to provide as much as 90 dB of conversion range. A second low-pass filter automatically nulls the input offset of the first stage down to the submicrovolt level. Adding external capacitors to both filters allows operation at input frequencies as low as a few hertz.
The AD606's limiter output provides a hard-limited signal output as a differential current of ±1.2 mA from open-collector outputs. In a typical application, both of these outputs are loaded by 200 Ω resistors to provide a voltage gain of more than 90 dB from the input. Transition times are 1.5 ns, and the phase is stable to within ±3° at 10.7 MHz for signals from -75 dBm to +5 dBm.
The logarithmic amplifier operates from a single +5 V supply and typically consumes 65 mW. It is enabled by a CMOS logic level voltage input, with a response time of <5 µs. When disabled, the standby power is reduced to <1 mW within 5 µs.
The AD606J is specified for the commercial temperature range of 0°C to +70°C and is available in 16-pin plastic DIPs or SOICs. Consult the factory for other packages and temperature ranges.
An evaluation board is available for this product and may be ordered using the following product number: AD606-EB
AD606JR 特点
- Logarithmic amplifier performance
-75 dBm to +5 dBm dynamic range <1.5 nV/√Hz input noise Usable to >50 MHz 37.5 mV/dB voltage output On-chip low-pass output filter - Limiter performance
±1 dB output flatness over 80 dB range ±3° phase stability at 10.7 MHz over 80 dB range Adjustable output amplitude - Low power
+5 V single supply operation 65 mW typical power consumption CMOS-compatible power-down to 325 µW typ <5 µs enable/disable time
AD606JR 功能框图
Functional Block Diagram for AD606
AD606JR 技术指标
| Dynamic Range (dB) | 80dB | Limiter Output | Yes |
| Phase Accuracy (deg) | ±3Deg | AC Linearity (± dB) | 1.5dB |
| Response Time (ns typ) | 400ns | Power Consumption (mW) | 65mW |
| Voltage Supply (V) | 4.5 to 5.5 | Package | 16-Lead DIP,16-Lead SOIC |
| Supply Current | 13mA |
AD606 订购指南
| 产品型号 | 产品状态 | 封装 | 引脚 | 温度范围 |
|---|---|---|---|---|
| AD606JN | 量产 | 16 ld PDIP | 16 | 商业 |
| AD606JNZ | 量产 | 16 ld PDIP | 16 | 商业 |
| AD606JR | 量产 | 16 ld PDIP | 16 | 商业 |
| AD606JR-REEL7 | 量产 | 16 ld PDIP | 16 | 商业 |
| AD606JRZ | 量产 | 16 ld PDIP | 16 | 商业 |
| AD606JRZ-REEL7 | 量产 | 16 ld PDIP | 16 | 商业 |
