AD7721AN: CMOS、12或16位、312.5 kHz/468.75 kHz Σ-Δ 型ADC
AD7721是一款完全低功耗、12位或16位Σ-Δ型ADC,采用+5 V电源供电,接受0 V至2.5 V或±1.25 V差分输入范围。模拟输入由模拟调制器以时钟频率两倍的速度连续采样,因而无需外部采样保持电路。调制器输出由两个串联的有限脉冲响应（FIR）数字滤波器处理。在大多数情况下,通过片内滤波可将外部抗混叠要求降至一阶。当主时钟频率等于15 MHz时,阶跃输入的建立时间为218.4 µs,而滤波器的群延迟为109.2 µs。
AD7721的输入带宽最高可达229.2 kHz,相应的输出字速率为468.75 kHz。该器件也可采用较低的时钟频率工作。由于采样速率、滤波器转折频率、建立时间、群延迟和输出字速率与外部时钟频率呈比例变化关系,因此这些参数也会相应降低。并行模式和串行模式下的最大时钟频率分别为10 MHz和15 MHz。
在调制器中使用单比特DAC可保证出色的线性度和直流精度。端点精度由片内失调与增益校准来保证,此校准程序可使器件的零电平与满量程误差降至最小。
输出数据通过串行或并行端口从输出寄存器中存取,这可实现与现代微控制器和数字信号处理器的轻松、高速接口。串行接口在内部时钟（主）模式下工作,AD7721提供所需的串行时钟。CMOS构造可确保低功耗,而且省电模式将功耗降至仅 100 µW。
The AD7721 is a complete low power, 12-/16-bit, sigma-delta ADC. The part operates from a +5 V supply and accepts a differential input of 0 V to 2.5 V or ±1.25 V. The analog input is continuously sampled by an analog modulator at twice the clock frequency eliminating the need for external sample-and-hold circuitry. The modulator output is processed by two finite impulse response (FIR) digital filters in series. The on-chip filtering reduces the external antialias requirements to first order in most cases. Settling time for a step input is 218.4 µs while the group delay for the filter is 109.2 µs when the master clock equals 15 MHz.
The AD7721 can be operated with input bandwidths up to 229.2 kHz. The corresponding output word rate is 468.75 kHz. The part can be operated with lower clock frequencies also. The sample rate, filter corner frequency, settling time, group delay and output word rate will be reduced also, as these are proportional to the external clock frequency. The maximum clock frequencies in parallel mode and serial mode are 10 MHz and 15 MHz respectively.
Use of a single bit DAC in the modulator guarantees excellent linearity and dc accuracy. Endpoint accuracy is ensured by on-chip calibration of offset and gain. This calibration procedure minimizes the part’s zero-scale and full-scale errors.
The output data is accessed from the output register through a serial or parallel port. This offers easy, high speed interfacing to modern microcontrollers and digital signal processors. The serial interface operates in internal clocking (master) mode, the AD7721 providing the serial clock.CMOS construction ensures low power dissipation while a power-down mode reduces the power consumption to only 100 µW.
AD7721AN 特点
- 16位Σ-Δ型ADC
- 输出字速率（OWR）：468.75 kHz
- 无失码
- 低通数字滤波器
- 高速串行接口
- 线性相位
- 输入带宽：229.2 kHz
- AVDD,DVDD电源：+5 V ± 5%
- 待机模式（70 µW）
- 并行模式（12位/312.5 kHz OWR）
- 16-Bit Sigma-Delta ADC
- 468.75 kHz Output Word Rate (OWR)
- No Missing Codes
- Low-Pass Digital Filter
- High Speed Serial Interface
- Linear Phase
- 229.2 kHz Input Bandwidth
- Power Supplies: AVDD, DVDD: +5 V ± 5%
- Standby Mode (70 µW)
- Parallel Mode (12-Bit/312.5 kHz OWR)
AD7721AN 功能框图
| 产品型号 | 产品状态 | 封装 | 引脚 | 温度范围 |
|---|---|---|---|---|
| AD7721AN | Prodn | 28 ld PDIP | 28 | 工业 |
| AD7721ANZ | Prodn | 28 ld PDIP | 28 | 工业 |
| AD7721AR | Prodn | 28 ld SOIC - Wide | 28 | 工业 |
| AD7721AR-REEL | Prodn | 28 ld SOIC - Wide | 28 | 商业 |
| AD7721ARZ | Prodn | 28 ld SOIC - Wide | 28 | 工业 |
| AD7721ARZ-REEL | Prodn | 28 ld SOIC - Wide | 28 | 商业 |
AD7721AN 应用技术支持与电子电路设计开发资源下载
- AD7721 数据手册DataSheet下载 . pdf
- Analog Devices, Inc.ADI 美国模拟器件公司产品订购手册 .pdf
- ADC模数转换器选型指南 . pdf
