AD9410 10位、210 MSPS ADC

AD9410: 10位、210 MSPS ADC

AD9410是一款10位单芯片采样模数转换器（ADC）,内置一个片内采样保持电路,专门针对高速转换和易用性进行了优化。该产品采用210 MSPS转换速率工作,在整个工作范围内都具有出色的动态性能。

该ADC要求采用5.0 V和3.3 V电源供电以及最高210 MHz的差分时钟输入,以便充分发挥其工作性能。对于大多数应用来说,无需外部基准电压源或驱动器件。数字输出为TTL/CMOS兼容,单独的输出电源引脚也支持3.3 V逻辑接口。采用差分时钟输入,且为TTL/CMOS兼容。10位数字输出可以采用3.3 V（2.5 V至3.6 V）电源供电。双输出总线支持最高105 MSPS速率的解复用数据,输出编码格式为二进制或二进制补码。针对具有时间依赖性的应用,该器件提供了数据同步功能。输出时钟简化了与外部逻辑的接口。可以选择输出数据总线定时用于并行或交错模式,从而提供灵活的输出数据锁存。AD9410采用先进的BiCMOS工艺制造,提供80引脚裸露焊盘超薄四方扁平封装,额定温度范围为-40°C至+85°C工业温度范围。

The AD9410 is a 10-bit monolithic sampling analog-to-digital converter (ADC) with an on-chip track-and-hold circuit and is optimized for high speed conversion and ease of use. The product operates at a 210 MSPS conversion rate, with outstanding dynamic performance over its full operating range.

The ADC requires a 5.0 V and 3.3 V power supply and up to a 210 MHz differential clock input for full performance operation. No external reference or driver components are required for many applications. The digital outputs are TTL-/CMOS-compatible and separate output power supply pins also support interfacing with 3.3 V logic.

The clock input is differential and TTL-/CMOS-compatible. The 10-bit digital outputs can be operated from 3.3 V (2.5 V to 3.6 V) supplies. Two output buses support demultiplexed data up to 105 MSPS rates and binary or twos complement output coding format is available. A data sync function is provided for timing-dependent applications. An output clock simplifies interfacing to external logic. The output data bus timing is selectable for parallel or interleaved mode, allowing for flexibility in latching output data.Fabricated on an advanced BiCMOS process, the AD9410 is available in an 80-lead thin quad flat package, exposed pad specified over the industrial temperature range (−40°C to +85°C).

AD9410 特点

SNR = 54 dB with 99 MHz analog input
500 MHz analog bandwidth
On-chip reference and track and hold
1.5 V p-p differential analog input range
5.0 V and 3.3 V supply operation
3.3 V CMOS/TTL outputs
Power: 2.1 W typical at 210 MSPS
Demultiplexed outputs each at 105 MSPS Output data format option
Data sync input and data clock output provided
Interleaved or parallel data output option
信噪比（SNR）：54 dB（99 MHz模拟输入）
500 MHz模拟带宽
片内基准电压源和采样保持
1.5 V p-p差分模拟输入范围
5.0 V和3.3 V电源供电
3.3 V CMOS/TTL输出
功耗：2.1 W（典型值,210 MSPS）
解复用输出（每路105 MSPS）
可选择输出数据格式
提供数据同步输入和数据时钟输出
可选择交错或并行数据输出

AD9410 技术指标

Resolution (Bits): 10bit
# Chan: 1
Sample Rate: 210MSPS
Interface: Par
Analog Input Type: Diff-Uni
Ain Range: 1.5 V p-p
ADC Architecture: Pipelined
Pkg Type: QFP

AD9410 亮点

High Resolution at High Speed-The architecture is spe-cifically designed to support conversion up to 210 MSPS with outstanding dynamic performance.
Demultiplexed Output-Output data is decimated by two and provided on two data ports for ease of data transport.
Output Data Clock-The AD9410 provides an output data clock synchronous with the output data, simplifying the timing between data and other logic.
Data Synchronization-A DS input is provided to allow for synchronization of two or more AD9410s in a system, or to synchronize data to a specific output port in a single AD9410 system.
高速、高分辨率--该架构专为支持最高210 MSPS的转换速率而设计,具有卓越的动态性能。
解复用输出--输出数据按1/2抽取,并在两个数据端口上输出,便于数据传输。
输出数据时钟--AD9410提供一个与输出数据同步的输出数据时钟,可简化数据与其它逻辑之间的时序。
数据同步--AD9410提供一个DS输入,可用于同一系统中的两个或多个AD9410实现同步,或使单个AD9410系统中的数据与某一特定输出端口同步。

AD9410 应用领域

通信和雷达
本地多点分配服务（LMDS）
高端成像系统和投影仪
电缆反转通路
点对点无线电链路

AD9410 功能框图

AD9410 芯片订购指南

产品型号	封装	引脚	温度范围	包装和数量	报价*(100-499)	报价*1000 pcs	RoHS
AD9410BSVZ 产品状态: 量产	80 ld TQFP-EP (14x14mm w/9.5mm EP)	80	工业	Tray, 90	$ 59.00	$ 53.10	是